National Instruments NI-5761 User Manual And Specifications
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National Instruments NI-5761 User Manual And Specifications

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  • Page 1 NI-5761...

  • Page 2: Table Of Contents

    NI 5761R User Guide and Specifications The NI 5761 is a 250 MS/s analog input adapter module designed to work in conjunction with your NI FlexRIO™ FPGA module. This document contains signal information and specifications for the NI 5761R, which is comprised of an NI FlexRIO FPGA module and the NI 5761. This document also contains tutorial sections that demonstrate how to acquire data using a LabVIEW FPGA example VI and how to create and run your own LabVIEW project with the NI 5761R.

  • Page 3: Front Panel And Connector Pinouts

    Front Panel and Connector Pinouts Front Panel Table 1 shows the front panel connector and signal descriptions for the NI 5761. Refer to the Specifications section of this document for additional signal information. Caution To avoid permanent damage to the NI 5761, disconnect all signals connected to the NI 5761 before powering down the module, and only connect signals after the adapter module has been powered on by the NI FlexRIO FPGA module.
  • Page 4 NI is not liable for any damage resulting from such signal connections. For the maximum input and output ratings for each signal, refer to the Specifications section of this document. © National Instruments Corporation NI 5761R User Guide and Specifications...

  • Page 5: Block Diagram

    Block Diagram Figure 2 shows the NI 5761 block diagram and signal flow to and from the NI 5761 component-level intellectual property (CLIP) by way of the adapter module and the corresponding NI 5761 CLIP in LabVIEW FPGA. NI 5761 Adapter Module LabVIEW FPGA CLIP PFI Input AUX I/O...

  • Page 6: Ni 5761 Component-Level Intellectual Property (Clip)

    CLIP Socket User-Defined LabVIEW Adapter Socketed CLIP FPGA VI Fixed I/O Module CLIP DRAM 0 DRAM 1 CLIP Socket CLIP Socket Socketed Socketed CLIP CLIP DRAM0 DRAM1 Figure 3. CLIP Relationship © National Instruments Corporation NI 5761R User Guide and Specifications...

  • Page 7: Cables

    The NI 5761 ships with socketed CLIP items that are used to add module I/O to the LabVIEW project. The NI 5761 ships with the following CLIP items: • NI 5761 Multiple Sample CLIP—Generates two samples per clock cycle at a clock rate that is half the sample rate.

  • Page 8: Clocking

    FPGA VI that supports your target. Select Window»Show Block Diagram to open the VI block diagram. On the block diagram, right-click the Open FPGA VI Reference (PXI-7952R) function and select Configure Open FPGA VI Reference. © National Instruments Corporation NI 5761R User Guide and Specifications...
  • Page 9 In the Configure Open FPGA VI Reference dialog box, click the Browse Project button in the Open VI section. In the Select VI dialog box that opens, expand the tree view for your device, select the VI under your device and click OK. Click OK in the Configure Open FPGA VI Reference dialog box.

  • Page 10: Creating A Labview Project And Run A Vi On An Fpga Target

    18. Wire an indicator to the output terminals of the IO Module\AI 0 Data N and IO Module\AI 0 Data N-1 nodes. 19. Wire an FPGA Clock Constant to the input node of the Timed Loop. Set this constant to IO Module Clock 0. © National Instruments Corporation NI 5761R User Guide and Specifications...
  • Page 11 Your block diagram should now resemble the block diagram in Figure 5. Figure 5. 5761SampleAcq (FPGA).vi Block Diagram Click the Clean Up Diagram button on the toolbar to cleanly organize the VI block diagrams. 20. Save the VI as 5761SampleAcq (FPGA).vi 21.
  • Page 12 Click the Run button to run the VI. The VI acquires data from the DUT on AI 0 Data N and AI 0 Data N-1. Click the STOP button on the front panel and close the VI. © National Instruments Corporation NI 5761R User Guide and Specifications...

  • Page 13: How To Use Your Ni Flexrio Documentation Set

    How to Use Your NI FlexRIO Documentation Set Refer to the Figure 7 and Table 4 for information about how to use your NI FlexRIO documentation set. INSTALL Hardware NI FlexRIO FPGA Module and Software Installation Guide and Specifications CONNECT Signals NI FlexRIO Adapter Module and Learn About User Guide and Specifications...

  • Page 14: Specifications

    Bandwidth (–3 dB)..........0.1 MHz to 500 MHz Bandwidth (–1 dB)..........1 MHz to 250 MHz For additional information on the ADS62P49, refer to the Texas Instruments device data sheet at www.ti.com © National Instruments Corporation NI 5761R User Guide and Specifications...
  • Page 15 Table 5 lists the AC-coupled spectral performance measurements. All values are measured with a 250 MHz external Sample clock. Table 5. AC-Coupled Spectral Performance Measurement 20.17 MHz 70.17 MHz 123.17 MHz 72.5 dB 71.4 dB 70.5 dB SINAD 72.3 dB 71.2 dB 70.3 dB SFDR...
  • Page 16 –55 –60 –65 –70 –75 –80 –85 –90 –95 –100 –105 –110 –115 Frequency (MHz) Figure 10. AC-Coupled Spectral Measurements: 20.1 MHz, –1 dBFS, 8,192 Point FFT, 10 RMS Average © National Instruments Corporation NI 5761R User Guide and Specifications...
  • Page 17 –5 –10 –15 –20 –25 –30 –35 –40 –45 –50 –55 –60 –65 –70 –75 –80 –85 –90 –95 –100 –105 –110 –115 Frequency (MHz) Figure 11. AC-Coupled Spectral Measurements: Terminated, 8,192 Point FFT, 10 RMS Average DC-Coupled Specifications Input range (normal operating conditions) ....1.23 V pk-pk Absolute maximum input........±4.5 V DC Bandwidth (–3 dB)..........DC to 500 MHz...
  • Page 18 NI FlexRIO Help. DC-Coupled Measurements –1 –2 –3 –4 –5 –6 –7 –8 –9 –10 –11 –12 –13 –14 –15 100k 100M 700M Frequency (Hz) Figure 12. DC-Coupled Bandwidth (Passband) © National Instruments Corporation NI 5761R User Guide and Specifications...
  • Page 19 –5 –10 –15 –20 –25 –30 –35 –40 –45 –50 –55 –60 –65 –70 –75 –80 –85 –90 –95 –100 –105 –110 –115 Frequency (MHz) Spectral Measurements: 19.5 MHz and 20.5 MHz, Figure 13. DC-Coupled –13 dBFS, 8,192 Point FFT, 10 RMS Average –5 –10 –15...
  • Page 20 Figure 15. DC-Coupled Spectral Measurements: Terminated, 8,192 Point FFT, 10 RMS Average Analog Input Phase Noise –70.0 –80.0 –90.0 –100.0 –110.0 –120.0 –130.0 –140.0 –150.0 –160.0 100k 500k Frequency Offset from 10 MHz Carrier (Hz) Figure 16. Analog Input Phase Noise © National Instruments Corporation NI 5761R User Guide and Specifications...
  • Page 21 Internal Sample Clock General Characteristics Oscillator type............Fixed frequency synthesizer Frequency...............250 MHz Reference spurs............<70 dBc Phase noise 10 kHz offset..........–100 dBc/Hz 100 kHz offset..........–120 dBc/Hz Clock distribution part number ......AD9512 ; clock distribution Reference clock sources.........Internal, External through the CLK IN connector, or IoModSyncClk Internal reference type ...........TCXO Internal reference stability ........±1 ppm...
  • Page 22 Field Name Vendor ID Product ID Serial Number Reserved 0x7C User Space Caution Only write to User Space. Writing to any other offset may cause the NI 5761 to stop functioning. © National Instruments Corporation NI 5761R User Guide and Specifications...
  • Page 23 Online Product Certification section. For PXI/PXI Express chassis configurations that group NI FlexRIO adapter modules in three or more contiguous slots, National Instruments recommends limiting the ambient operating temperature to less than 50 °C. NI 5761R User Guide and Specifications ni.com...
  • Page 24 Certification column. Environmental Management National Instruments is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial not only to the environment but also to NI customers.

  • Page 25: Where To Go For Support

    For patents covering National Instruments products/technology, refer to the appropriate location: Help»Patents in your software, the patents.txt file on your media, or the National Instruments Patent Notice at ni.com/patents.

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Ni 5761r

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