Lvds And Edp Port Inverter / Backlight Connector (Cn2, Cn8) - Asus AAEON GENE-APL7 User Manual

2.6.1 LVDS and eDP Port Inverter / Backlight Connector (CN2, CN8)

Pin Pin Name
1 BKL_PWR
2 BKL_CONTROL
3 GND
4 GND
5 BKL_ENABLE
Note: BKL_PWR can be set to +5V or +12V by configuring JP2 and JP5 for dedicated
port. Driving current supported up to 2A.
Chapter 2 – Hardware Information
1
BLK_PWR
BKL_CONTROL
2
GND
3
GND
4
BKL_ENABLE
5
Signal Type
PWR
OUT
GND
GND
OUT
Signal level
+5V / +12V
+3.3V
19