Philips 32PFL3904H/12 Service Manual page 20

EN 20 5. Q543.1E LA
The exact timings to
switch on the
display (LVDS
delay, lamp delay)
are defined in the
display file.
The sum of the LVDS delay and the Lamp delay needs
to be used because the Lamp delay is specified with
the appearance of the LVDS on the display as
reference. This moment is not known by ceplf, only the
switch on of the LCD power is known. The delta
The complete algorithm description is
removed here.
Only the start of the algorithm
is mentioned here as reminder.
2009-Nov-20
Service Modes, Error Codes, and Fault Finding
Constraints taken into account:
- Display may only be started when valid LVDS output clock can be delivered by the AVC.
- To have a reliable operation of the backlight, the backlight should be driven with a PWM duty cycle of 100%
during the first seconds. Only after this first one or two seconds, the PWM may be set to the required output level
(Note that the PWM output should be present before the backlight is switched on). To minimize the artefacts, the
picture should only be unblanked after these first seconds.
The assumption here is that a fast toggle (<2s) can
only happen during ON->SEMI ->ON. In these states,
the AVC is still active and can provide the 2s delay. A
transition ON->SEMI->STBY->SEMI->ON cannot be
made in less than 2s, because the standby state will
be maintained for at least 4s.
CPipe already generates a valid output
clock in the semi-standby state: display
startup can start immediately when leaving
the semi-standby state.
No
Switch on the display power by
switching LCD-PWR-ON low
Wait x ms
Switch on LVDS output in 8543
between both is the LVDS delay.
Start POK line detection
algorithm
return
The higher level requirement is that audio and video
should be demuted without transient effects and that
the audio should be demuted maximum 1s before or
at the same time as the unblanking of the video.
The higher level requirement is that the
ambilight functionality may not be switched on
before the backlight is turned on in case the
set contains a CE IPB inverter supply.
Figure 5-6 "Semi Stand-by" to "Active" flowchart
Semi Standby
Wait until previous on-state is left more than 2
seconds ago. (to prevent LCD display problems)
Assert RGB video blanking
and audio mute
Display already on?
(splash screen)
No
PNX5100 present?
Yes
Switch on the display by sending the
TurnOnDisplay(1) (I²C) cmd to the PNX5100
Delay Lamp-on with the sum of the LVDS delay and
the Lamp delay indicated in the display file
Switch off the dimming backlight feature, set
the BOOST control to nominal and make sure
PWM output is set to 100%
Switch on LCD backlight (Lamp-ON)
Wait until valid and stable audio and video, corresponding to the
requested output is delivered by the AVC
AND
the backlight has been switched on for at least the time which is
indicated in the display file as preheat time.
Switch Audio-Reset low and wait 5ms
Release audio mute and wait 100ms before any other audio
handling is done (e.g. volume change)
Restore dimming backlight feature, PWM and BOOST output
and unblank the video.
Switch on the Ambilight functionality according the last status
settings.
Startup screen Option
and Installation setting
Photoscreen ON?
Yes
Display cfg file present
and up to date, according
correct display option?
No
Yes
Prepare Start screen Display config
file and copy to Flash
Active
Yes
Initialize audio and video
processing IC's and functions
according needed use case.
No
18440_217_090227.eps
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