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B E D I E N E L E M E N T E
B E D I E N E L E M E N T E
B E D I E N E L E M E N T E
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CONTROL ELEMENTS
iD + iDdp Front Panel
iD and iDdp front panels look equal
1 DISPLAY
All parameter and function settings are controlled using the display and
the four cursor buttons.
2 + 3 STATUS Indicators
The three blue indicators show the lock status of the currently active clock
source. The five red indicators show important system statuses of iD.
4 CURSOR Buttons
All parameter and function settings are controlled using the four cursor
buttons and the display.
iD Rear Panel
1
2
4
3
iDdp Rear Panel
1 + 2 INPUT1, INPUT2
These universal input terminals allow for applying various external clock
signals for synchronizing the internal clock synthesizer. All clock formats
supported by the system can be received at any of these inputs. These two
inputs and INPUT 3 can be synchronized by the synthesizer in a freely confi-
gurable sequence. The impedance of each input is 75 Ω and can be switched
off internally for chaining devices, see the »Switching-off the Termination
of the universal Clock Inputs« section in the APPENDIX.
3 ALARM OUT
The iC-ALARM output is optionally available (item no. 8005-065). Refer to
the EXTENSIONS chapter for a short overview.
4 INPUT3 (AES/EBU)
A balanced digital AES/EBU signal can be applied to this input for synchro-
nizing the internal clock synthesizer. The signal must comply with
AES3 – 1992 (R1997) or AES11 – 1997.
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1
5
2
3
Refer to the OPERATIONS chapter for more
information.
6
7
8
9
Both input terminals are isolated to ground
to avoid interference from the connected
clock line.
If this does not comply with the electrical
studio purposes, the ground connections of
both inputs could be linked permanently by
setting jumpers on the mainboard. Refer to
the »Connecting the universal Clock Inputs
to Ground« section in the APPENDIX for a
short instruction.
4
10
11
12
88
9
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