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IC3401
(VENUS ENGINE)
CLK48 V9A
MCKI AC27
TCXO27N ADJ
GPIO0 T1
PW REG3V
4
5
Y
VCC
IC3408
(GATE IC)
A
B
GND
1
2
3
PW REG3V
AUD EXTCLK O
GPIO15 N4
CH3514
S2M INT1
GPIO159
F18
CH3513
S2M RDY INT0
GPIO160 G18
CH3512
S2M RDY INT1
GPIO161
F19
CH3511
S2M REQ INT0
GPIO162 G19
CH3510
S CAMCPU SCK
GPIO258 V24
CH3509
S CAMCPU DO
GPIO260 W25
CH3508
S CAMCPU DI
GPIO259 V23
CH3507
S CAMCPU CS
GPIO261 W24
CH3506
S BECPU SCK
GPIO155 F16
CH3505
S BECPU DO
GPIO157 F17
CH3504
S BECPU DI
GPIO156 G16
CH3503
S BECPU CS
GPIO158 G17
3
GND
IC3504
IC3503
(GATE IC)
Y
(TCC BRIDGE)
4
IO L1P CCLK 2 N13
IO L3P D0 DIN MISO MISO1 2 N11
CLK27 BRIDGE
IO L30N GCLK0 USERCCLK 2
P8
IC3101
(FPGA)
CH3126
CLK12 M2
C15
IO L11P T1 SRCC 16
PW REG3V
CLK12 M1
(To IC4601-13)
4
5
Y
VCC
IC3403
(GATE IC)
A
B
GND
1
2
3
PW REG3V
IC3501
(VENUS ENGINE)
J2
GPIO29
J3
GPIO30
GPIO31
J4
H1
GPIO32
V24
GPIO258
V23
GPIO259
W25
GPIO260
W24
GPIO261
K2
GPIO25
K3
GPIO26
K4
GPIO27
J1
GPIO28
PW REG1.8V
PW REG1.8V
2
1
3
2
1
B
A
GND
B
A
IC3505
(GATE IC)
Y
VCC
VCC
5
4
5
PW TCXO3V
IC3104
(GATE IC)
Y
4
IO L13P T2 MRCC 34 W7
GND
3
IC3124
B
2
(GATE IC)
A
5
VCC
1
PW FPG1.8V
CLK48 V9B
MCKI AC27
PW FPG1.8V
3
2
1
GND
B
IC3113
(GATE IC)
Y
VCC
4
5
CH3517
PW FPG1.8V
PW TCXO3V
PW TCXO3V
A
1
VCC
5
IC3114
B
2
(GATE IC)
3
GND
4
Y
IC3111
(GATE IC)
X3101
A
(27MHz)
PW TCXO3V
5
1
VCC
NC
5
VCC
1
B
2
2
A
GND
3
GND
3
4
4
Y
Y
PW FPG1.8V
IC3115
(CLOCK GENERATOR)
CLKIN
CLKOUT
INPUT
OUTPUT
6
PLL
3
BUFFER
BUFFER
VDD 1
OE
4
PW TCXO3V
FSEL
5
IC3117
(GATE IC)
A
HC-X1 SYSTEM CONTROL CIRCUIT ( 2 ) BLOCK DIAGRAM
5
4
Y
VCC
IC3116
(GATE IC)
A
B
GND
1
2
3
PW FPG1.8V
3
2
1
GND
B
A
Y
VCC
4
5
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