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1
1
Then, ADD 1:
1
1
This is our two's complement value which we program into our offset matrix.
You'll see these diodes in the position for -1.6 MHz TX offset.
Even though it appears that we are adding a huge N number to the original
transmitter frequency, the binary adders will follow the rules of binary addition
and provide the proper programming information to the PLL synthesizer.
EXAMPLE 2: RECEIVER OSCILLATOR FREQUENCY
We know from previous circuit discussion that the PLL synthesizer must run
21.4 MHz higher when in receive mode. Two things must be done to do this;
first, we switch out varactor diode D3 to allow the VCO L-C circuitry to tune
21.4 MHz lower, and secondly, program in a 'minus' 21.4 MHz offset to the
synthesizer. This offset is permanently programmed into the matrix because the
21.4 MHz 1st IF is integral to the FX receiver design. Look closely at the
Receive offset diode row and see why the diodes are installed the way they
are.
N = 21400 ÷ 5 KHz = 4,280
Binary code for N=4,280
Now, invert all the bits:
8192 4096 2048 1024
0
1
1
0
Add 1:
1
0
You'll see this is the number programmed into the Receive offset matrix line for
a minus 21.4 MHz offset.
EXAMPLE 3. TWO'S COMPLEMENT WITH CARRY
For illustration purposes, we'll pick an odd-ball offset such as 640 KHz. In this
case, N = 640 ÷ 5 KHz = 128.
Binary code for N=128
BASICS OF EXTERNALLY CONTROLLED FX-TRANSCEIVER FREQUENCY
8192 4096 2048 1024
0
0
1
1
1
1
1
1
512
0
0
0
1
1
1
1
1
1
512
0
0
0
0
1
0
0
1
1
256
128
64
0
1
1
0
1
1
0
1
256
128
64
0
1
1
1
0
0
32
16
0
1
1
0
0
0
0
32
16
0
0
0
1
0
8
1
0
1
8
0
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