Sony HCD-LV100AV Service Manual page 59

Compact hi-fi stereo system
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VIDEO BOARD IC502 M30620MC-A17FP
Pin No.
Pin Name
1
SENSE
2
SENSE CLK
3
DSP DATA
4
DSP LATCH
5
DSP CLK
6
TSENS
7
REMOTE IN
8
BYTE
9
VSS
10
DSP MUTE
11
CTRL1
12
XRESET
13
XOUT
14
VSS
15
XIN
16
VCC
17
NMI
18
SCOR
19
DSENS
20
CL680 HINT
21
CL680 SEL
22
DF LATCH
23
CL680 HRDY
24
CL680 RESET
25
JOG1
26
JOG2
27
CTRL2
28
LDON
29
CLK
30
DATA
31
DATA1O
32
DATA1I
33
CLK1
34
SHARPNESS
35
XVLEVEL. DOWN
36
SUBQ DATA
37
SUBQ CLK
38
P.ON
39
BUS XRDY
40
BUS
41
BUS XHOLD
(CD MECHANISM CONTROLLER)
I/O
I
Internal status (SENSE) signal input from the CXD3008Q (IC101)
O
Sense serial data reading clock signal output to the CXD3008Q (IC101)
O
Serial data output to the CXD3008Q (IC101)
O
Serial data latch pulse output to the CXD3008Q (IC101)
O
Serial data transfer clock signal output to the CXD3008Q (IC101)
I
Disc tray status detection signal input terminal Not used
I
Remote control signal input terminal Not used (open)
I
External data bus line byte selection signal input "L": 16 bit, "H": 8 bit (fixed at "L")
Ground terminal
O
Muting on/off control signal output to the CXD3008Q (IC101) "H": muting on
Clock selection signal output to the CXD3008Q (IC101)
O
"L": 16.9344 MHz (double speed), "H": 33.8688 MHz
Reset signal input from the system controller (IC501) "L": reset
I
For several hundreds msec. after the power supply rises, "L" is input, then it changes to "H"
O
Main system clock output terminal (10 MHz)
Ground terminal
I
Main system clock input terminal (10 MHz)
Power supply terminal (+5V)
I
Non-maskable interrupt input terminal (fixed at "H" in this set)
I
Subcode sync (S0+S1) detection signal input from the CXD3008Q (IC101)
I
Disc status detection signal input terminal Not used
I
Interrupt request signal input from the MPEG video/audio decoder (IC505)
O
Command selection signal output to the MPEG video/audio decoder (IC505)
O
Serial data latch pulse output to the D/A converter (IC509) "L" active
I
Ready status detection signal input from the MPEG video/audio decoder (IC505)
O
Reset signal output to the MPEG video/audio decoder (IC505) "L": reset
I
Rotary encoder jog dial pulse input terminal Not used (fixed at "H")
I
Rotary encoder jog dial pulse input terminal Not used (fixed at "H")
O
Laser power selection signal output to the CXA2568M (IC103) "H": double speed
O
Laser on/off selection signal output to the CXA2568M (IC103) "H": laser on
Communication data reading clock signal input or transfer clock signal output with the system
I/O
controller (IC501) and fluorescent indicator tube driver (IC601)
Communication data bus with the system controller (IC501) and fluorescent indicator tube driver
I/O
(IC601)
O
Serial data output to the MPEG video/audio decoder (IC505) and D/A converter (IC509)
I
Serial data input from the MPEG video/audio decoder (IC505)
Serial data transfer clock signal output to the MPEG video/audio decoder (IC505) and D/A
O
converter (IC509)
O
Sharpness control signal output of the video signal (Y signal) "H" active ("L": normal)
O
Not used (open)
I
Sub-code Q data input from the CXD3008Q (IC101)
O
Sub-code Q data reading clock signal output to the CXD3008Q (IC101)
O
Power on/off control signal output terminal Not used (open)
I
Ready signal input terminal Not used (fixed at "H")
O
Not used (open)
I
Hold signal input terminal Not used (fixed at "H")
Description
59

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