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LESSON 25: Using Interrupts
NEW INSTRUCTIONS
EI
Enable interrupts after the next instruction is executed. No flags are affected.
DI
Disable interrupts after the DI instruction has been executed. No flags are affected.
RIM
(See Instruction Set Encyclopedia)
SIM
(See Instruction Set Encyclopedia)
The 8085 has 5 pins, namely TRAP, RST 5.5, RST 6.5, RST 7.5 and INTR, dedicated to be sources of interrupts. The
program that follows illustrates using the RST 7.5 interrupt. If a 1 appears on the RST 7.5 pin and the interrupt has not
been disabled (disabling interrupts is explained later) then the program that is currently running will be "interrupted" and the
address of the instruction that would have been executed next is pushed on the stack. The microprocessor then jumps to
address 003C where there are MOS instructions which get an address from a reserved RAM location and then jump to that
address. This location which holds the address to which the microprocessor will jump is called a vector. The vector allows
the occurrence of an interrupt to run a specific program that can be located anywhere in RAM. Programs of this type are
called interrupt service routines (ISRs).
The ISR should always return the registers that it uses with the same values that they had when the interrupt occurred.
This can be done by PUSHing the registers and then POPing them before returning to the interrupted program. After
PUSHing the registers, the real purpose of the ISR can be accomplished which, in the case of this program, is to increment
a value that is in memory. Before exiting the ISR, all registers that were PUSHed, must be POPed, then an EI (enable
interrupt) instruction followed by a RET instruction must be executed. The EI instruction is needed because whenever an
interrupt occurs, the 8085 automatically performs a DI (disable interrupts). The RET instruction will return the program
counter to the section of code that was interrupted.
You can cause the 8085 to ignore (disable) all interrupts, except TRAP, through the DI instruction. This is used in the
following program to keep interrupts from occurring while a vector is made for the RST 7.5 interrupt, while the 8155 timer is
being set up and while the RST 7.5 interrupt mask is enabled through the SIM instruction.
The SIM instruction has two purposes: to control the SOD pin (this will not be used in this lesson), and to provide interrupt
control. Using this instruction allows the RST 7.5, RST 6.5 and RST 5.5 interrupts can be disabled individually. Before
using the SIM instruction to control interrupts the A register should be loaded with the following 8 bit binary value:
A mask bit of 1 disables the corresponding interrupt. If the mask bit is 0, then the interrupt will be enabled if an EI has
already occurred, or as soon as an EI is executed.
The RST 7.5 interrupt pin is different than the other interrupt pins in that it has a flip flop connected to it. When a pulse
appears on the RST 7.5 pin, the flip flop is set. If the flip flop is set and the interrupt is enabled, or it becomes enabled, the
flip flop will be reset and the ISR will be executed. The ability of the flip flop to remember that an interrupt request has
occurred while interrupts were disabled helps the microprocessor avoid missing interrupt requests. When enabling the
RST 7.5 interrupt for the first time in a program you should clear this flip flop. This is done by making bit four of the A
register a 1 before executing the SIM instruction. In this program we will enable only the RST 7.5 interrupt and reset its flip
flop, so the binary value of 00011011 (1B hex) would be loaded into the accumulator before executing SIM.
The program below will set the RST 7.5 interrupt vector to jump to the ISR at FF20, initialize the 8155 timer to send a 20hz
square wave to the RST 7.5 pin and then enable the RST 7.5 interrupt. After that it will enter a loop which loads the A
register with the data at address FF2E and sends the data to the discrete LEDs. The ISR will interrupt this loop 20 times
op code = FB
op code = F3
op code = 20
op code = 30
x is the mask bit for RST 7.5
y is the mask bit for RST 6.5
z is the mask bit for RST 5.5
00011xyz
75
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