EMAC PRIMER Instruction Manual page 61

FF0D
FF0E
FF0F
FF10
FF11
FF12
FF13
FF14
FF15
Load the program into memory and press the reset button. Load the HL register with 0002 and the DE register with FFFF
and do the following:
CURRENT PC
FF01 Single step and the HL register will be PUSHed on the stack. Examine the stack contents and they will be
the same as the HL register. This value on the stack determines how many times the addition will be
performed.
FF02 Single step and HL will be loaded with 0000 which is the beginning value for the sum.
FF05 Single step twice and the MOV B,H and MOV C,L instructions will be executed which make BC=0000
which is the high order word of the result.
FF07 Single step and the DAD D instruction will cause DE to be added to the sum that is held in HL (examine
HL).
FF08 Since the result of the DAD D instruction is small enough to fit in the HL register pair, the carry flag is not
set. Therefore the JNC FF0C instruction will be executed which will jump over the INX B instruction.
Single step and PC will be FF0C, which is the address of the instruction following INX B.
FF0C Examine the stack contents and the HL register then single step. Examine the stack contents and HL
register again and you will see that the XTHL instruction has exchanged their values; HL is now the
number of additions that are left to do, and the value on the stack holds the sum from the addition.
FF0D Single step and 1 will be subtracted from HL which indicates that there is now 1 addition left to go.
FF0E The instruction at this address and the one at the following address are used to determine whether HL is
0000. These two instructions are needed because the DCX H instruction doesn't affect any flags. Single
step and the H register will be copied to the A register.
FF0F Single step again and the A register will be ORed with the L register without changing the L register.
Remember that by definition when you logically OR bits, a zero will result only if the bits being ORed are
both 0. So if registers A and L are both 0 then the ORA L instruction will cause the zero flag to be 1,
otherwise the zero flag will be 0. In this case the value of L is 1 and A is 0 so the zero flag will be 0.
FF10 Single step and the XTHL instruction will swap the value on the stack with the value in HL. This makes HL
the sum again and the value on the stack is the number of additions left to go.
FF11 Single step and the JNZ instruction will be executed which will return the PC to FF07. Notice that the
XTHL instruction was executed after the ORA L instruction that determines whether the HL register pair is
0000. Since XTHL doesn't affect the flag register, the flags that were affected by the ORA L instruction
are the same as before XTHL was executed.
FF07 Single step and the DAD D instruction will be executed which will add DE to the sum in HL again.
FF08 This time the result of the addition wouldn't fit in the HL register pair, so the carry flag is set. Single step
and the JNC FF0C instruction won't be executed since the carry flag is 1, instead PC will be changed to
the address of the instruction following JNC FF0C.
FF0B Single step and 1 will be added to the BC register pair. This will happen in this program every time the
carry flag is set by the previous DAD D instruction.
2B DCX H
7C MOV A,H
B5 ORA L
E3 XTHL
C2 JNZ FF07
07
FF
F1 POP PSW
FF RST 7
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