Sony TRINITRON BVM-A14F5M Service Manual page 163

IC900
TC74VHC14FT(EL)
IC900
3.3V_FPGA2
TC74VHC14FT(EL)
INVERTER
R903
10k
1/10W
FPGA_DONE[1]
RN-CP
12 13 HS_REF_X2
D4 D4
IO
AD.L[1]
C3 C3
IO V_DRIVE_P
C2 C2
IO
HS_PLL_X2
B1 B1
IO
FPGA_RESET[1]
G5 G5
R_DRIVE_COMP
IO
BLK_X
F4 F4
IO
3.3V_FPGA2
100IRE_P
D3 D3
IO
SETUP_P
E4 E4
R973
IO RGB_CUTOFF_X
22k
1/10W CONV_HATCH_X
F5 F5
RN-CP IO
RB902
22 E3 E3
IRQ_X.L[7] IO
D2 D2
B_DRIVE_COMP
IO
E2 E2
V_SYNC_X
IO
D1 D1
H_SYNC_X
IO
F3 F3
IO
G3 G3
DU_R_X IO
F2 F2
DU_G_X
IO
E1 E1
DU_B_X
IO
G2 G2
DU_BLK_X
IO
F1 F1
RB903
IO
22
H5 H5
B_SMPL_P IO
3.3V_FPGA2
R910
G4 G4
22
IO
1/10W
1.5V
RN-CP R902
10k
1/10W
RN-CP H2 H2
DATA0
DATA0
H3 H3
NCONFIG nCONFIG
C900
0.01
H6 H6
25V VCCA_PLL1
B
CLK_RW.L
1608 -3 G1 G1
CONFIG_CONTROL CLK0
R970
H1 H1
22 CLK1
Q900 1/10W
DTC123JUA-T106 RN-CP
J6 J6
0.5 GNDA_PLL1
CONFIG CONTROL SW -3
J5 J5
GNDG_PLL1
H4 H4
SYS_CLK nCEO
3.3V_FPGA2
J4 J4
nCE
J3 J3
MSEL0
J2 J2
MSEL1
-3
K4 K4
DCLK
DCLK
BYPASS[3]
K3 K3
IO
BYPASS[0]
J1 J1
IO
BYPASS[2] K2 K2
IO
BYPASS[4] L3 L3
IO
BYPASS[1]
K1 K1
IO
R917 47 1/10W RN-CP
L1 L1
DU_DAC_CLK IO
DB[9] R923 47 1/10W RN-CP
L2 L2
IO
DB[8] R922 47 1/10W RN-CP
M1 M1
IO
DB[7] N1 N1
IO
DB[6]
M2 M2
IO
DB[5]
N2 N2
IO
DB[4]
M3 M3
IO
RB911
BYPASS[6]
47 L5 L5
IO W_SMPL_P
BYPASS[7] M4 M4
IO
N3 N3
100IRE_P_MUX
IO
R919
22 K5 K5
IO
1/10W
BYPASS[5] RN-CP
L4 L4
IO
DB[3]
R1 R1
IO
DB[2]
P2 P2
B2 IO
DB[1] P3 P3
B1
IO
BYPASS
DB[0]
N4 N4
BO
IO
RB910
47
DUF_B
IC903
TC74VHC04FT(EL)
R905 IC902
INVERTER
22
EP1C6F256C6N
1/10W
RN-CP FPGA2(DAC,OSD,DU,PULSE GEN)
OP_SETUP_P
4 3
IC903
TC74VHC04FT(EL)
R904
INVERTER
22
1/10W
RN-CP
OP_100PCT_P
6 5
VM_BUS.LOCAL
BVM-A14
A B
3.3V_FPGA2
14
VCC C1946
0.1
25V
B
1608
GND
7
-3
IC904
R913
TC74VHC14FT(EL)
100 B15 B15
1/10W INVERTER IO
RN-CP
13 12 A15 A15
IO
JL914
B14 B14
IO
C13 C13
IO
3 4 B13 B13
IO
IC900 A13 A13
IO
TC74VHC14FT(EL)
INVERTER B12 B12
IO
TC74VHCT541AFT(EL)
5 6 C12 C12
IO
IC900
E12 E12 RB904
IO 47
TC74VHC14FT(EL)
DRIVE_SAMPLING_P Y8
INVERTER E11 E11
IO
9 8 E9 E9 BIAS_SAMPLING_P Y7
IO
IC900 BIAS_CLAMP_P Y6
D12 D12
TC74VHC14FT(EL) IO
INVERTER R_CUTOFF_X_P Y5
D11 D11
IO
JL911 G_CUTOFF_X_P Y4
C11 C11
IO
JL910 B_CUTOFF_X_P Y3
B11 B11
IO
JL909 DU_CLAMP_P Y2
A11 A11
IO
JL907 BIAS_DRIVE_P_CA
Y1
B10 B10
IO
RB905
JL908 47 G2
C10 C10
+5V_C
IO
VCC
D10 D10 C904
IO
0.1
JL904 25V
A9 A9
B
IO
JL905
B9 B9 1608
IO
D9 D9
IO
JL906
C9 C9
IO
E10 E10
IO
E8 E8
IO
JL903
C8 C8
IO
D8 D8
IO
JL901
A8 A8
IO
JL902
B8 B8
IO
D7 D7 3
HS_CLK
IO
SLOT_X.L
C7 C7
IO TC74VHC14FT(EL)
JL900
B7 B7
IO
A6 A6 9
R971
IO AFC_CLK
22
1/10W
E7 E7
TC74VHC14FT(EL)
RN-CP IO
0.5
A_X/D.L
B6 B6
IO
R/W_X.L
C6 C6
IO
R972
D6 D6
22
IO
1/10W
RN-CP D5 D5
0.5 IO
E6 E6
IO
E5 E5
IO
AD.L[6]
C5 C5
IO
AD.L[7]
B5 B5
IO
AD.L[5]
A4 A4
IO
AD.L[4] B4 B4
IO
AD.L[3]
C4 C4
IO
AD.L[2]
B3 B3
IO
AD.L[0]
A2 A2
IO
B2 B2
IO
R911
22
1/10W
RN-CP
IC902
EP1C6F256C6N
FPGA2(DAC,OSD,DU,PULSE GEN)
3.3V_FPGA2
IC907
EPC2LC20N-TP
FPGA2 CONFIG ROM
R930 18 17 16 15 14
10k
1608 1/10W
6.3V
RN-CP
100
B C902
25V
0.1
C901
19 TMS nINIT_CONF 13
-3
20 VCC nCASC 12
TDO_FPGA2_ROM
1 TDO TDI 11
DATA0 2 DATA GND 10
3 TCK nCS 9
R925
4.7k
1/10W
RN-CP
JTAG
-3
4 5 6 7 8
DCLK
NSTATUS
CONF_DONE
C
BK (11/15) BK (11/15)
3.3V_FPGA2
14
VCC C903
0.1
25V
B
GND 1608
IC904 7
TC74VHC14FT(EL)
-3 -3
N13 N13
IO
P14 P14
IO
P15 P15
B_SEL_X
IO
R16 R16
R0 IO
N15 N15
G_SEL_X
IO
1 3 5 7
N16 N16
R_SEL_X
IO
IC905
K12 K12
IO
RB912
2.2k K14 K14
BUFFER
IO
2 4 6 8 L12 L12
IO
GND N14 N14
IO
A8 M13 M13
IO
A7
M14 M14
IO
A6
L13 L13
IO
A5
M15 M15
GAMMA_X IO
A4
M16 M16
BIAS_DAC IO
A3
L14 L14
IO
A2
L15 L15
DRIVE_DAC
IO
A1
L16 L16
MARKER_DAC
IO
G1
K16 K16
G_D_IK_DAC
IO
3.3V_FPGA2
K15 K15
B_D_IK_DAC IO
J16 J16
IO
R916
R915 R926 R927
10k 10k 10k 10k
1/10W 1/10W 1/10W 1/10W
RN-CP
RN-CP RN-CP RN-CP
K13 K13
CONF_DONE
CONF_DONE
J13 J13
NSTATUS
nSTATUS
J14 J14
TCK
J15 J15
TMS
V_MODE
H15 H15
R928
TDO
10k
1/10W BIAS_DRIVE_P
J12 J12
RN-CP
GNDG_PLL2
G2_BLK_P
J11 J11
GNDA_PLL2
JL912 -3 W_B_INSERT_P
4 1 2 H16 H16
CLK3
IC904 IC904
JL913 BIAS_P
G16 G16
TC74VHC14FT(EL)
CLK2
INVERTER INVERTER 1.5V
BLACK_SAMPLING_P
H11 H11
VCCA_PLL2
WHITE_SAMPLING_P
8 11 10 H14 H14
C906
0.01 TDI
IC904 IC904 25V
B
TC74VHC14FT(EL)
-3
1608
INVERTER INVERTER
H12 H12
IO
G14 G14
B_D_V_DAC
IO
G13 G13
IO
G15 G15
R_D_IK_DAC
IO
F16 F16
VCO_FREQ_SW_HS
IO
F14 F14
R_D_V_DAC
IO
F13 F13
IO
F15 F15
G_D_V_DAC IO
E16 E16
VCO_FREQ_SW_AFC IO
E15 E15
G2_DAC
IO
D16 D16
VCO_SELECT
IO
D15 D15
G_B_IK_DAC IO
E14 E14
B_B_IK_DAC IO
F12 F12
IO
E13 E13
IO
D14 D14
R_B_IK_DAC
IO
R912 22 1/10W RN-CP H13 H13
IO
AFC_P_X
G12 G12
IO
5 6 B16 B16
AFC_P IO
R929
IC904 C15 C15
100
IO
1/10W
TC74VHC14FT(EL)
RN-CP C14 C14
INVERTER
IO
D13 D13
IO
1 2
G_DRIVE_COMP
IC900
TC74VHC14FT(EL)
INVERTER
H_OUT_X
R918 IC902
22 EP1C6F256C6N
1/10W
RN-CP FPGA2(DAC,OSD,DU,PULSE GEN)
NCONFIG
TDO_FPGA1_ROM
-3
3.3V_FPGA2
R924
100
1/10W
RN-CP
D900
CL-191YG-CD-T
LED
Q901
DTC123JUA-T106
11 10
LED SW
IC900
TC74VHC14FT(EL)
-3
INVERTER
8-21 8-21
D E
3.3V_FPGA2
14
C1947
VCC
0.1
25V
B
1608
IC903 GND
7
TC74VHC04FT(EL)
-3
IC903
TC74VHC04FT(EL)
R906 INVERTER
22
1/10W
RN-CP
DF_MASK_P
2 1
IC903
TC74VHC04FT(EL)
R908
INVERTER
22
1/10W
R2 R2
RN-CP B2
IO
CONV_PLL_V
10 11 T2 T2
B1
IO
IC903 R3 R3
TC74VHC04FT(EL) BO IO
R909
22
INVERTER P4 P4
1/10W IO
RN-CP
R4 R4
CONV_PLL_H
IO
12 13
T4 T4
IC903 IO
TC74VHC04FT(EL)
R5 R5
R907
INVERTER IO
22
1/10W
P5 P5
RN-CP
IO
ASD_REF_P
M5 M5
8 9
IO
M6 M6
IO
N5 N5
3.3V_FPGA2
R921 47 1/10W RN-CP
DG[9] IO
N6 N6
DG[8] R920 47 1/10W RN-CP IO
P6 P6
IO
DG[7]
R6 R6 C907
IO 100
DG[6] 6.3V
M7 M7
IO
RB909
DG[5] 47 T6 T6
IO
DG[4]
R7 R7
IO
P7 P7
IO
N7 N7
IO
DG[3]
R8 R8
IO
DG[2]
T8 T8
IO
RB908
DG[1] 47 N8 N8
IO
DG[0]
P8 P8
IO
DUF_G
M8 M8
IC906 IO
TC74VHCT541AFT(EL)
M10 M10
IO
BUFFER
RB906
R9 R9
47 IO
Y8 GND
T9 T9
IO
Y7 A8
P9 P9
IO
Y6 A7
N9 N9
IO
Y5 A6
R10 R10
IO
Y4 A5
T11 T11
IO
Y3 A4
N10 N10
IO
Y2 A3
P10 P10
IO
Y1 A2
R11 R11
R914
IO
RB907 +5V_C 0
47 G2 A1
CHIP P11 P11
IO
VCC G1
C905 N11 N11
IO
0.1
R975
25V
N12 N12
B 2.7k
IO
1/10W
RN-CP
1608 M9 M9
0.5 IO
R901
DR[9] 47 1/10W RN-CP M11 M11
IO
DR[8] R900 47 1/10W RN-CP
M12 M12
IO
DR[7]
P12 P12
IO
DR[6]
R12 R12
IO
DR[5]
T13 T13
IO
DR[4] R13 R13
IO
RB900
47 R14 R14
IO
DR[3]
P13 P13
IO
DR[2]
T15 T15
IO
DR[1]
R15 R15
IO
DR[0]
R0
RB901
47
DUF_R
IC902
EP1C6F256C6N
FPGA2(DAC,OSD,DU,PULSE GEN)
F G
1
1.5V
C930
100
6.3V
-3
C908 A7
0.01 25V B VCCINT
1608
C909 A10
VCCINT
0.1 25V B
1608
G8
VCCINT
G10
VCCINT
H7
C910
VCCINT
0.1 25V B 1608
C911 H9
VCCINT
0.1 25V B 1608
C912 J8
VCCINT
0.1 25V B 1608
J10
C913
VCCINT
0.1 25V B 1608
K7
VCCINT
K9
VCCINT
T7
C914
VCCINT
0.1 25V B 1608
C915 T10
0.01 25V B VCCINT 2
1608
-3
C916 C1
VCCIO1
0.01 25V B 1608
G6
C917
VCCIO1
0.1 25V B 1608
-3 P1
C918
VCCIO1
0.1 25V B 1608
C919 T3
VCCIO4
0.1 25V B 1608
C920 L7
0.01 25V B VCCIO4
1608
L10
C921
VCCIO4
0.1 25V B 1608
C922 T14
VCCIO4
0.01 25V B 1608
C923 P16
VCCIO3
0.01 25V B 1608
K11
C924
VCCIO3
0.1 25V B 1608
C925 C16
VCCIO3
25V B 1608
0.1
C926 A14
VCCIO2
25V B
0.1 1608
C927 F10
VCCIO2
0.01 25V B 1608
F7
C928
VCCIO2
0.1 25V B 1608
C929 A3
VCCIO2
0.01 25V B 1608
-3
A1
GND
A16
GND
A5
3
GND
A12
GND
F6
GND
F8
GND
F9
GND
F11
GND
G7
GND
G9
GND
G11
GND
H8
GND
H10
GND
J7
GND
J9
GND
K6
GND
K8
GND
K10
GND
L6
GND
L8
GND
L9
GND
4
L11
GND
T1
GND
T5
GND
T12
GND
T16
GND
-3
IC902
EP1C6F256C6N
FPGA2(DAC,OSD,DU,PULSE GEN)
5
H