Sony TRINITRON BVM-A14F5M Service Manual page 151

+3.3V
IC303
TC7SH14FU(TE85R.JF)
FB304
SCHMITT INVERTER
0uH
VCC NC
IN
INIT_DONE_X OUT GND
+3.3V
FB303
0uH
D29_R10
R306
C328
10k
0.1 D30_R10
1/10W 25V
RN-CP
B
1608
C326 IRQ4_X
VOUT VDD 0.1 N.C VCC
LED.DIGIT[1]
25V
B
1608
SUB IN_A D21_R10
C327
0.01
NC GND GND OUT_Y D27_R10
25V
B
1608
D25_R10
IC311
IC310 TC7SH14FU(TE85R.JF)
LED.SEG[7]
BD4828FVE-TR SCHMITT INVERTER
3.3V RESET C329
D23_R10
0.1
25V
B
D28_R10
1608
NC VCC
IN D26_R10
GND OUT D19_R10
D15_R10
IC312
TC7SZ05FU(TE85R)
D22_R10
OPEN DRAIN INVERTER
D24_R10
D18_R10
D20_R10
C300
0.1
LED.DIGIT[0]
C301
25V
100
B
10V
18 17 16 15 14 D17_R10
1608
JTAG.TMS NCONFIG
19 TMS nINIT_CONF 13
IC301
20 VCC nCASC 12
EPC2LC20N-TP
TDI.FPGA
FPGA ROM
1 TDO TDI 11 FPGA_ROM.TDI LED.WE_X
DATA
2 DATA GND 10
JTAG.TCK CONF_DONE
3 TCK nCS 9
4 5 6 7 8
+3.3V-3
D13_R10
D16_R10
D12_R10
C325
0.1
25V
D11_R10
B
NC VCC
1608 D14_R10
IN
D10_R10
GND OUT CONF_DONE_X
D8_R10
IC302 D6_R0
TC7SH14FU(TE85R.JF)
SCHMITT INVERTER
D2_R0
D4_R0
D0_R0
HS_X[1]
SEG[1]
D7_R0
+3.3V
D5_R0
SEG[0]
FB305 D9_R10
0uH
CS2_UART_X
IC313
C340
C342
TC74HC4538AFT(EL)
0.01 0.01
CS2_FRAM_X
25V MULTIVIBRATOR HARDWARE RESET
25V
B
R333 B D1_R0
10k 1608
1608
1/10W
GND VCC D3_R0
RN-CP
C341
0.01
CX1/RX1 GND 25V
R592 1/10W B
1k RN-CP 1608
H/W.RST_EN
RESET1 CX2/RX2
R595
1k
1/10W
H/W.RST A1 RESET2
RN-CP
R336 0 CHIP
R334
1k
B1 A2
1/10W
0 CHIP
RN-CP R337
H/W.RESET Q1 B2
R335 R338 0 CHIP
0
CHIP
Q1 Q2
XX
R339
GND Q2
R340 XX
BVM-A14
A B
TA.VM_BUS
+3.3V-3
R302
10k
1/10W
RN-CP
TA.R/W_X
D4 D4
IO INIT_DONE
R596
REM_X[7]
C3 C3
IO
IRQ[6]
C2 C2
IO
1/10W
R452
IRQ[7]
22 RN-CP B1 B1
IO
G5 G5 IRQ[5]
IO
IRQ[4]
F4 F4
IO
DIG[1]
D3 D3
IO
E4 E4 ADIN_X[3] R597
IO
DIG[2]
F5 F5
IO
TA.A_X/D
E3 E3
IO
ADIN_X[7]
D2 D2
IO
ADIN_X[6]
E2 E2
VS_X[1] IO
ADIN_X[5]
D1 D1
IO
IRQ[3]
F3 F3
IO
IRQ[2]
G3 G3
IO
F2 F2 ADIN_X[4]
IO
IRQ[1]
E1 E1
IO
G2 G2
IO
F1 F1 ADOUT6
IO
JTAG
ADOUT7
H5 H5
IO
R301
ADOUT5 10k
G4 G4
1/10W
IO
+3.3V-3 RN-CP
R305
10k
1/10W
DATA RN-CP CONF_DONE
H2 H2
DATA0 R300
R309
10k
NCONFIG 10k NSTATUS
H3 H3
1/10W 1/10W
nCONFIG
RN-CP
+1.5V RN-CP
JTAG.TCK
H6 H6
VCCA_PLL1
JTAG.TMS
G1 G1
CLK0
H1 H1
JTAG.TDO
CLK1
R307
0 J6 J6
GNDA_PLL1
CHIP
J5 J5
GNDG_PLL1
H4 H4
FPGA.CKIO
nCEO
R303
10k TA.CLK_RW
J4 J4
1/10W
nCE
RN-CP
J3 J3
MSEL0
J2 J2 TDI.FPGA
MSEL1
DCLK R304
K4 K4
0
DCLK
DIG[0]
CHIP
ADIN_X[1] R603
K3 K3
IO
ADIN_X[0] R604
J1 J1
IO
ADOUT4
K2 K2
IO
ADOUT3
L3 L3
IO
K1 K1
IO SLAVE
L1 L1
FPGA.RESET
IO
ADOUT2
L2 L2
IO
ADOUT1
M1 M1
IO
N1 N1 ADOUT0
IO
M2 M2
IO BAT.IRQ_X
N2 N2
IO RTC.AIRQ_X
M3 M3
TP308
IO
R477 1/10W
POWER
100 RN-CP L5 L5
IO
BREQ
M4 M4
IO
BACK
N3 N3
IO
R480 1/10W
ADIN_X[2]
100 RN-CP K5 K5
IO
L4 L4
IO ICE
R482 1/10W
22 RN-CP
R1 R1
IO CS2_VMBUS_X
1/10W
R483
22 RN-CP P2 P2
IO RTC.TIRQ_X
P3 P3
CS2
IO
N4 N4
IO CS5
IC300
EP1C6F256C6N
FPGA BUS INTERFACE
C
BC (6/7) BC (6/7)
FLASH
R593
0
CHIP
N13 N13 R2 R2
IO H/W.RST
0 CHIP R503 1/10W
P14 P14 FLASH1.RY/ BY 22 RN-CP T2 T2
IO
R504 1/10W
FLASH1. WP/ACC 22 RN-CP
P15 P15 R3 R3
IO
1/10W
R505
FLASH2.RY/ BY
R16 R16 22 RN-CP P4 P4
IO
R591 1/10W
N15 N15 LAN.SW 22 RN-CP R4 R4
IO
R506 1/10W
LAN.AEN RN-CP
N16 N16 22 T4 T4
IO
1/10W 1/10W
R486 R507
LAN.RD
100 RN-CP K12 K12 10 RN-CP R5 R5
IO
R594 0 CHIP
CHIP
0 K14 K14 P5 P5
H/W.RST_EN
IO
R487 1/10W R509 1/10W
SEG[2]
100 RN-CP L12 L12 100 RN-CP M5 M5
IO
R510 1/10W
R598 0 CHIP SEG[3]
N14 N14 100 RN-CP M6 M6
IO
R511 1/10W
R599 0 CHIP FLASH2. WP/ACC 22 RN-CP
M13 M13 N5 N5
IO
R512 1/10W
R600 0 CHIP SEG[4]
M14 M14 100 RN-CP N6 N6
IO
R601 0 CHIP
L13 L13 P6 P6
IO
R514 1/10W
LAN.WR 10 RN-CP
M15 M15 R6 R6
IO
R515 1/10W
SEG[5]
M16 M16 100 RN-CP M7 M7
IO
R579 1/10W
0 CHIP
R602 L14 L14 22 RN-CP T6 T6
IO LAN.A3
R580 1/10W
RN-CP
L15 L15 22 R7 R7
IO
LAN.A2
TP306
L16 L16 P7 P7
IO
R488 1/10W
22 RN-CP K16 K16 N7 N7
IO
R489 1/10W R581 1/10W
22 RN-CP K15 K15 22 RN-CP R8 R8
IO
1/10W LAN.A1 1/10W
R490 R582
22 RN-CP J16 J16 22 RN-CP T8 T8
IO
LAN.A0
N8 N8
K13 K13 P8 P8
CONF_DONE
+3.3V-3
R524 1/10W
SEG[6]
J13 J13 100 RN-CP M8 M8
nSTATUS
R607 0 CHIP
J14 J14 M10 M10
R508
TCK P_ASEMD0
XX
J15 J15 R9 R9
TMS
H15 H15 14INCH T9 T9
TDO
R308 R513
4.7k J12 J12 10k P9 P9
GNDG_PLL2
1/10W
RN-CP
J11 J11 N9 N9
GNDA_PLL2
R529 1/10W
H16 H16 LAN.ARDY 22 RN-CP R10 R10
CLK3
R530 1/10W
R608 0 CHIP
G16 G16 22 RN-CP T11 T11
TP307
CLK2
REM_X[2]
H11 H11 N10 N10
+1.5V VCCA_PLL2
H14 H14 REM_X[1] P10 P10
TDI
REM_X[0]
R11 R11
R491 1/10W
REM_X[3]
100 RN-CP H12 H12 P11 P11
IO
R531 1/10W
0 CHIP FREE[2] 22 RN-CP
G14 G14 N11 N11
IO
0 CHIP REM_X[5]
G13 G13 N12 N12
IO
R492 1/10W R532 1/10W
SEG[7]
22 RN-CP G15 G15 100 RN-CP M9 M9
IO
R493 1/10W R533 1/10W
22 RN-CP FREE[1] 22 RN-CP
F16 F16 M11 M11
IO
R534 1/10W
R605 0 CHIP FREE[0]
F14 F14 22 RN-CP M12 M12
IO
F13 F13 REM_X[4] P12 P12
IO
R494 1/10W R535 1/10W
RN-CP LAN.BE1 RN-CP
22 F15 F15 22 R12 R12
IO
1/10W 1/10W
R495 R536
LAN.BE0
22 RN-CP E16 E16 22 RN-CP T13 T13
IO
R496 1/10W R537 1/10W
22 RN-CP E15 E15 XILINX.DOE_X[1] 22 RN-CP R13 R13
IO
R538 1/10W
XILINX.DOE_X[0]
D16 D16 22 RN-CP R14 R14
IO
REM_X[6]
D15 D15 P13 P13
IO
R539 1/10W
VMS.ADOE_X 22 RN-CP
E14 E14 T15 T15
IO
R497 1/10W R540 1/10W
100 RN-CP F12 F12 22 RN-CP R15 R15
IO SLOT_X[2]
R498 1/10W
22 RN-CP E13 E13
IO
R499 1/10W
22 RN-CP
D14 D14
IO
R606 0 CHIP
H13 H13
IO
TP309
G12 G12
IO
R500 1/10W
22 RN-CP
B16 B16
IO
C15 C15
IO
R501 1/10W
22 RN-CP C14 C14
IO
R502 1/10W
22 RN-CP D13 D13
IO
IC300
EP1C6F256C6N
FPGA BUS INTERFACE
8-9 8-9
D E
R567 1/10W
22 RN-CP B15 B15
IO WAIT IO
R568
0 CHIP A15 A15
RD/WR
IO IO
R569
0 CHIP
B14 B14
IO WE3 IO
1/10W
R570
47 RN-CP C13 C13
IO CS0 IO
R571 1/10W
47 RN-CP B13 B13
IO WE2 IO
R572
CHIP
0 A13 A13
IO WE1 IO
R573
0 CHIP B12 B12
IO WE0 IO
C12 C12
IO IO
R575 1/10W
STAND_BY
100 RN-CP E12 E12
IO IO
R576 1/10W
OVERLOAD
100 RN-CP E11 E11
IO IO
LED.SEG[1]
E9 E9
IO IO
D12 D12
IO A25 IO
RB300 R578 1/10W 0.5
TALLY
68 2.2k RN-CP D11 D11
IO IO
A23
C11 C11
IO IO
A22 VS_X[0]
B11 B11
IO IO
R541 1/10W
A21 68 RN-CP A11 A11
IO RD IO
R542 1/10W
A20 RN-CP
22 B10 B10
IO BS IO
RB301
68 C10 C10
IO A19 IO
D10 D10
IO A18 IO
A9 A9
IO A17 IO
B9 B9
IO A24 IO
D9 D9
IO LED.SEG[0] IO
C9 C9
IO IO
RB302
E10 E10
68
IO IO
E8 E8
IO A16 IO
C8 C8
IO A15 IO
D8 D8
IO LED.SEG[2] IO
A8 A8
IO IO
B8 B8
IO IO
D7 D7
IO IO
HS_X[0]
C7 C7
IO IO
B7 B7
IO IO
LED.SEG[3]
A6 A6
IO RB303 IO
47
E7 E7
IO A14 IO
B6 B6
IO IO
A13
C6 C6
IO A12 IO
D6 D6
IO LED.SEG[4] IO
D5 D5
A1_R68
IO IO
LED.SEG[5]
E6 E6
IO IO
LED.SEG[6]
E5 E5
IO IO
A11 C5 C5
IO FPGA.A3 IO
A10
B5 B5
IO IO
A9
A4 A4
IO IO
A8 B4 B4
IO IO
D31_R10 RB304
C4 C4
IO 47 IO
B3 B3
IO IO
A7
A2 A2
IO IO
A6
B2 B2
IO IO
A5
A4
RB305
IC300
47 A2_R68 IC300
EP1C6F256C6N
EP1C6F256C6N
A0
FPGA BUS INTERFACE FPGA BUS INTERFACE
PQ070XZ01ZPH
+3.3V
1 2
FB350
0uH
C382
C380
0.1
100
25V
6.3V
B
1608
F G
1
+1.5V
C323
A7 A7
220
VCCINT
4V
A10 A10
VCCINT
G8 G8
VCCINT
C320
G10 G10
0.1
VCCINT
25V
B H7 H7
1608
VCCINT
C318
0.1 H9 H9
25V VCCINT
C316 B
J8 J8
0.1 1608
VCCINT
25V
B J10 J10
1608
C314 VCCINT
+3.3V
0.1
K7 K7
25V
VCCINT
B
1608 K9 K9
C312
VCCINT
0.01
25V
FB302
T7 T7
B
0uH VCCINT
1608
C310
0.01 T10 T10
VCCINT
25V +3.3V-3
B
C307
1608 2
0.01
25V
C1 C1
B
VCCIO1
1608
G6 G6
VCCIO1
P1 P1
C304
0.01 VCCIO1
25V
T3 T3
B
VCCIO4
1608
L7 L7
VCCIO4
C324
L10 L10
100
6.3V VCCIO4
T14 T14
VCCIO4
P16 P16
VCCIO3
C322 K11 K11
0.1 VCCIO3
25V
C16 C16
B
C321 VCCIO3
0.1 1608
A14 A14
25V
VCCIO2
B
1608
F10 F10
C319
VCCIO2
0.1
25V F7 F7
C317
B VCCIO2
0.1
25V 1608 A3 A3
B VCCIO2
1608
C315
0.1
25V A1 A1
C313
B GND
0.1
25V 1608 A16 A16
B
GND
1608
A5 A5
GND
3
A12 A12
C311
GND
0.01
25V F6 F6
C309
0.01 B GND
25V
1608
F8 F8
B
GND
1608
F9 F9
C308 GND
0.01
C306
25V F11 F11
0.01
B GND
25V
1608
B G7 G7
GND
1608
G9 G9
C305
GND
0.01
25V G11 G11
B GND
1608
H8 H8
GND
H10 H10
C302
0.01 GND
25V
J7 J7
B
GND
1608
J9 J9
GND
K6 K6
GND
K8 K8
GND
K10 K10
GND
L6 L6
GND
L8 L8
GND
L9 L9
GND
4
L11 L11
GND
T1 T1
GND
T5 T5
GND
TP300
T12 T12
GND
T16 T16
GND
IC300
EP1C6F256C6N
FPGA BUS INTERFACE
D355
MA111-TX
IC351
+1.5V REG
+1.5V
TP302
3 4 5
5
R312 C384
C385
200 0.1
FB301
25V 220
1/10W
4V 0uH
RN-CP B
0.5
1608
R311
1k
1/10W
RN-CP
0.5
H