XGS 12000, XGS 9400 and
XGS 8000 Global Shutter
CMOS Image Sensors
XGS Family
Description
The XGS CMOS image sensor family provides high resolution,
high performance global shutter image capture. The family comes in
different resolutions in a single package; 8.8, 9.4 and 12.6 Megapixels
with up to 1−inch optical format. The 21 mm x 20 mm package makes
the XGS family particularly suited for integration in 29 mm x 29 mm
camera formats. The high speed, 12−bit output maximally leverages
interfaces such as USB 3.2, Thunderboltt 2 and 10 GigE.
Image data is read out through a column ADC architecture and then
transferred over a HiSPi interface. On−chip logic, programmable via
the serial interface, generates internal timing for integration and
readout control. Up to three register conÂfigurations can be
programmed and sequentially enabled (frame by frame) using a single
command over the control interface.
Table 1. KEY PERFORMANCE PARAMETERS
Parameter
Optical Format
XGS 12000
XGS 9400
XGS 8000
Active Pixels
XGS 12000
XGS 9400
XGS 8000
Pixel Size
3.2 mm
Color Filter Array
Monochrome, Bayer
Shutter Type
Global Shutter
Input Clock
32.4 MHz
Output Interface
HiSPi (24 Lanes − 777.6 Mbps/lane)
Frame Rate (12−bit)
24 Lanes (−X1)
XGS 12000
XGS 9400
XGS 8000
12 Lanes (−X2)
XGS 9400
XGS 8000
6 Lanes (−X3)
XGS 12000
Read Noise
< 4 e− (1x), 1.9 e
SNR
40 dB
MAX
Dynamic Range
68 dB
Supply Voltages
1.2V, 2.8 V, 3 V (0.4 V, 1.8 V Optional)
Power Consumption
1 W (Full Speed, Full Resolution)
Operating Temp.
−40°C to 85°C (Junction)
Package
163−pin CLGA (Ceramic Land Grid Array)
© Semiconductor Components Industries, LLC, 2018
April, 2020 − Rev. 3
Typical Value
1−inch (16.4 mm Diagonal)
1/1.2−inch (13.9 mm Diagonal)
1/1.1−inch (14.8 mm Diagonal)
4096 (H) x 3072 (V)
3072 (H) x 3072 (V)
4096 (H) x 2160 (V)
90 fps
90 fps
128 fps
56 fps
80 fps
28 fps
−
(4x)
1
www.onsemi.com
Features
•
On−chip 12−bit Column ADCs
•
10−bit Mode with Increased Frame Rate of
100 fps (24−lane) at Full Resolution
•
Companding Mode for 60 fps (12−lane)
and 30 fps (6−lane) at Full Resolution
•
Data Interface: 24−lane HiSPi (Scalable
Low−Voltage Signaling)
•
Configurable Number of HiSPi Lanes:
24, 18, 12 or 6 Lanes
•
2
Two−Wire (I
C) and Four−Wire (SPI)
Serial Interface
•
Triggered Integration and Readout Control
•
Programmable Control for up to 8 Regions
of Interest (ROI)
•
Context Switching
•
These Devices are Pb−Free, Halogen Free/
BFR Free and are RoHS Compliant
Applications
•
Machine Vision
•
Security
•
Intelligent Transportation Systems (ITS)
•
Broadcasting
•
Medical
•
Scientific
Publication Order Number:
XGS12M/D
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