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SD-AS10H
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SD-AS10H
Service Manual
SD-AS10H
Audio
CHAPTER 8.
OTHER
[1] Function table of IC
IC101 VHiCS493264-1: DSP (CS493264) (1/2)
Pin No.
Terminal Name
1
VD1
2
DGND1
3
AUDATA3, XMT958
4
WR, DS, EMWR, GPIO10
5
RD, R/W, EMOE, GPIO11
6
A1, SCDIN
7
A0, SCCLK
8-11
DATA7, EMAD7, GPIO7-
DATA4, EMAD4, GPIO4
12
VD2
13
DGND2
14-17
DATA3, EMAD3, GPIO3-
DATA0, EMAD0, GPIO0
18
CS
19
SCDIO, SCDOUT, PSEL,
GPIO9
20
INTREQ, ABOOT
21
EXTMEM, GPIO8
22
SDATAN1
23
VD3
24
DGND3
Input/Output
Input
Digital positive supplies. Norminally + 2.5 V.
—
Digital ground.
Output
CMOS level output that contains a biphase-mark encoded (S/PDIF) or I
digital audio data which is capable of carrying two channels of PCM digital audio or an
IEC61937 compressed-data interface.
Note: Outputting of IEC61937 is only available for certain broadcast-based application
codes which run on the CS4931X family or CS49330 device.
This output typically connects to the input of an RS-422 transmitter or to the input of an opti-
cal transmitter.
Input
In Intel parallel host mode, this pin serves as the active-low data-write-input strobe.
In Motorola parallel host mode, this pin serves as the active-low data-strobe-input signal.
In serial host mode, this pin can serve as the external-memory active-low write-enable out-
put signal.
Also in serial host mode, this pin can serve as a general purpose input or output bit.
Input
In Intel parallel host mode, this pin serves as the active-low data bus enable input.
In Motorola parallel host mode, this pin serves as the read-high/write-low control input sig-
nal.In serial host mode, this pin can serve as the external memory active-low data-enable
output signal.
Also in serial host mode, this pin can serve as a general purpose input or output bit.
Input
In parallel host mode, this pin serves as one of two address input pins used to select one of
four parallel registers. In SPI serial host mode, this pin serves as the data input.
Input
In parallel host mode, this pin serves as one of two address input pins used to select one
four parallel registers. In serial host mode, this pin serves as the serial control clock signal,
specifically as the SPI clock input or the I
Input
In parallel host mode, these pins provide a bidirectional data bus.
If a serial host mode is selected, these pins can provide a multiplexed address and data bus
for connecting an 8-bit external memory. Otherwise, in serial host mode, these pins can act
as general-purpose input or output pins that can be individually configured and controlled by
the DSP.
Input
Digital positive supplies. Norminally + 2.5 V.
—
Digital ground.
Input
In parallel host mode, these pins provide a bidirectional data bus.
If a serial host mode is selected, these pins can provide a multiplexed address and data bus
for connecting an 8-bit external memory. Otherwise, in serial host mode, these pins can act
as general-purpose input or output pins that can be individually configured and controlled by
the DSP.
Input
In parallel host mode, this pin serves as the active-low chip-select input signal.
In serial host SPI mode, this pin is used as the active-low chip-select input signal.
Input
2
In I
C mode, this pin serves as the open-drain bidirectional data pin. In SPI mode this pin
serves as the data output pin. In parallel host mode, this pin is sampled at the rising edge of
RESET to configure the parallel host mode as an Intel type bus or as a Motorola type bus.
In parallel host mode, after the bus mode has been selected, the pin can function as a gen-
eral-purpose input or output pin.
2
In I
C mode this pin is an OPEN DRAIN I/O and requires a 4.7 kohms Pull-Up.
—
Open-drain interrupt-request output. This pin is driven low to indicate that the DSP has out-
going control data and should be serviced by the host.
Also in serial host mode, this signal initiates an automatic boot cycle from external memory if
it is held low through the rising edge of reset.
OPEN DRAIN I/O - Requires 4.7 kohms Pull-Up.
Input
In serial control port mode, this pin can serve as an output to provide the chip-select for an
external byte-wide ROM. In parallel and serial host mode, this pin can also function as a
general-purpose input or output pin.
Input
Digital-audio data input that can accept from one to six channels of compressed or PCM
data. SDATAN1 can be sampled with either edge of SCLKN1, depending on how SCLKN1
has been configured.
Input
Digital positive supplies. Norminally + 2.5 V.
—
Digital ground.
8 – 1
Function
2
S or Left Justified
2
C clock input.
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