Medalist SL Family Product Manual, June 1996
The drive operates at multiword DMA mode 2 timing specifications, as
shown below.
DMARQ
DMACK−
DIOR− or DIOW−
Read data valid
Write data valid
TI
Figure 10. Multiword DMA timing
Time
Description
T0
Cycle time
TD
DIOW– or DIOR– pulse width (16-bit)
TE
DIOR– data access
TF
DIOR– data hold
TG
DIOW– data setup
TH
DIOW– data hold
TI
DMACK– to DIOR– or DIOW– setup
TJ
DIOR– or DIOW– to DMACK– hold
TK
DIOR– negated pulse width
R
TK
DIOW– negated pulse width
W
TL
DIOR– to DMARQ delay
R
TL
DIOW– to DMARQ delay
W
TE
TF
TG
TH
TD
TK
T0
120 nsec
70 nsec
5 nsec
20 nsec
10 nsec
0 nsec
5 nsec
25 nsec
25 nsec
37
TL
TJ
Min
Max
—
—
—
30 nsec
—
—
—
—
—
—
—
—
30 nsec
—
30 nsec