Fault Insertion Capabilities; Digital Signal Capabilities - ALIARO AL-1032 Manual

32 channels multi-function board
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Table 3: General Signal Capabilities
Parameter
Voltage range
Internal time resolution
Temperature range

Fault Insertion Capabilities

Fault insertion is the process of sending a known error (fault) to a Device Under Test (DUT) to
understand the reaction from the device. This includes several types of simulated failures such
as short or open circuits, error signals or sensor failures.
Failure signals can be passed to the DUT using the two Fault Insertion (FI) busses (AUX 1 &
AUX 2). FI busses are available on all channels.
FI busses are in most cases connected to (DUT +) and (DUT –) to simulate short circuits. FI
busses may also be used for advanced fault insertions, such as using external power supplies to
simulate surges or other unwanted conditions.
Table 4: Fault Insertion Capabilities
Parameter
Current protection (DUT to
AUX)

Digital Signal Capabilities

The AL-1032 Board provides digital input or output signal conditioning on each channel. This is
done using 32 isolated TTL I/O signals available via a RTI backplane.
The SLSC control interface is used to configure each of the I/O signals with each input signal
being configured using a threshold. This enables the detection of any logic level such as 3.3V,
5V, 12V or 24V.
Output signals may be configured as being either pull-up, pull-down, or both.
In addition, the SLSC and the Ethernet interface provide I/O functionality for setting and reading
the digital I/O. This avoids the need for additional DAQ cards.
Table 5: Digital Signal Capabilities
Parameter
Digital In: Threshold, range
Digital In: threshold, resolution
Digital In: Threshold, hysteresis
Digital In: Threshold, accuracy
Digital Input: Frequency range
Digital In: Latency (DUT => DI I/O)
ALIARO reserve the right to vary from the description given in this data sheet and shall not be liable for any errors.
Value
-60V to 60V
10ns
0°C to +40°C
Value
1000mA
www.aliaro.com
Comments/Additional
FPGA clock 100MHz
Comments/Additional
Value
0 to 30 V
12 bit
0.2 V
0.2 V
0 to 10 MHz
50 ns

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