Circuit Module Physical Layouts, Bill Of Materials, And Schematic; List Of Figures 1 Bq27742Evm Layout, Silk Screen - Texas Instruments bq27742EVM User Manual

Single-cell impedance track technology evaluation module
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2.2
Pin Descriptions
3

Circuit Module Physical Layouts, Bill of Materials, and Schematic

This section contains the printed-circuit board (PCB) layout, bill of materials, assembly drawings, and
schematic for the bq27742 circuit module.
3.1
Board Layout
This section shows the printed-circuit board (PCB) layers
and schematic for the bq27742 module.
J1
CELL+
TP2
TB1
CELL-
TP1
SLUUAX8 – March 2014
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Pin Name
Description
PACK+
Pack positive terminal
PACK–
Pack negative terminal
CELL+
Cell positive terminal
CELL–
Cell negative terminal
TERM
Thermistor input that leads to IC TS pin
2
SDA
I
C communication data line
2
SCL
I
C communication clock line
HDQ
Single-wire communication line
VSS
Signal return for communication line
J4
J9
J10
TP6
TP11
C4
REG25
C2
TP8
C1
TS
C7
RA0
TP5
TP3
DSG
C5
TP7
CHG
RT1
RT2
Figure 1. bq27742EVM Layout, Silk Screen
bq27742EVM Single-Cell Impedance Track™ Technology Evaluation Module
Copyright © 2014, Texas Instruments Incorporated
(Figure 1
through
J2 J3
R18
HDQ PULLUP
AUX
INT. 1.8V Pull up
TEMP
R8
R9
R10
R4
R6
J15
D2
R7
J14
J7
Q2
Q4
BAT
J12
J13
VPWR
J11
Q1
R3
J6
R2
TP10
PACK-/
FET
LOAD-
BYPASS
J5
bq27742-Based Circuit Module
Figure
4), assembly drawing,
J8
TP9
TB2
Q3
HDQ
THERM
PACK-/
3

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