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Development
Board Setup
Figure 2–1. Cyclone III Development Board Layout and Components
DC Power
Input (J2)
Power Switch (SW1)
Sense Resistor
for Shared I/O
Power (JP3)
16-Mbyte
Parallel
Flash (U6)
USB
Connector
(J3)
Flash LED
USB
UART (U8)
JTAG Header (J4)
Altera Corporation
March 2010
The development board is preloaded with an example design to
demonstrate the Cyclone
the preloaded design also enables you to quickly confirm that the board
is operating correctly. See
1-Mbyte SSRAM (U5)
Reconfigure
and Reset
Push Buttons
32-Mbyte
DDR SDRAM (U4)
System Clock
2. Development Board &
Control Panel Setup
®
III device and board features. At power-up,
Figure
2–1.
Sense Resistor for FPGA
Core Power Measurement (JP6)
User Push Button Switches
User LEDs
50-MHz
HSMC
Connector (J1)
Cyclone III Device (U1)
Configuration Done LED
2–1
Preliminary
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