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TMC22091/TMC22191
Digital Video Encoders/Layering Engine
Features
• All-digital video encoding
• Internal digital oscillators, no crystals required
• Multiple input formats supported
– 24-bit and 15-bit GBR/RGB
– YC
C
422 or 444
B
R
– Color indexed
• 30 overlay colors (TMC22191)
• Fully programmable timing
• Supports input pixel rates of 10 to 15 Mpps
• 256 x 8 x 3 color look-up tables (bypassable on
TMC22191)
• 8-bit mask register
• 8-bit composite digital video input
• Hardware and 24-bit data keying
• Synchronizes with TMC22071 Genlocking Video
Digitizer
• 8:8:8 video reconstruction
• SMPTE 170M NTSC or CCIR Report 624 PAL
compatible
• Supports PAL-M and NTSC without pedestal
• Simultaneous S-VIDEO (Y/C) NTSC/PAL output
• 10-bit D/A conversion (three channels)
Logic Symbol
BYPASS and OL 4:0 on TMC22191 only.
24
PD 23-0
6
OL 4-0
PDC
VHSYNC
VVSYNC
KEY
BYPASS
8
TMC22x91
CVBS 7-0
DIGITAL
GHSYNC
VIDEO
GVSYNC
ENCODER
RESET
8
D 7-0
2
A 1-0
CS
R/W
CHROMA
LUNA
COMPOSITE
V
REF
COMP
R
REF
TDI
TMS
TCK
TDO
LDV
PXCK
27008A
• Controlled edge rates
• 3 power-down modes
• Built-in color bars and modulated ramp test signals
• JTAG (IEEE Std 1149.1-1990) test interface
• Single +5V power supply
• 84 lead PLCC package
• 100 lead MQFP package
Description
The TMC22x91 digital video encoders convert digital com-
puter image or graphics data (in RGB, YCBCR, or color
indexed format) or a CCIR-601 signal into a standard analog
baseband television (NTSC or PAL) signal with a modulated
color subcarrier.
Both composite (single lead) and S-VIDEO (separate
chroma and luma) formats are active simultaneously at the
three analog output pins, each of which generates a standard
video-level signal into doubly-terminated 75Ω load.
The TMC22x91 accepts digitized video from the companion
TMC22071 Genlocking Video Digitizer. Soft switching
between video sources is done under either hardware or
programmable data control.
The TMC22191 offers 4-layer keying capability, bypassable
CLUT, and 30 Overlay colors.
The TMC22x91 is fabricated in a submicron CMOS process
and packaged in an 84 Lead Plastic Leadless Chip Carrier, or
in a 100 Lead Metric Quad Flat Pack. Performance is guar-
anteed from 0°C to 70°C.
Rev. 1.1.0
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Table of Contents
Related Manuals for Exar TMC22091
Summary of Contents for Exar TMC22091
- Page 1 TMC22091/TMC22191 Digital Video Encoders/Layering Engine Features • Controlled edge rates • 3 power-down modes • All-digital video encoding • Built-in color bars and modulated ramp test signals • Internal digital oscillators, no crystals required • JTAG (IEEE Std 1149.1-1990) test interface •...
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Page 2: Block Diagram
Functional Description Timing The encoder operates from a single clock at twice the system The TMC22091 and TMC22191 are totally integrated, fully- pixel rate. This frequency may be set between 20 MHz and programmable digital video encoders with simultaneous 36 MHz (pixel rates of 10 Mpps to 18 Mpps). Within this composite and Y/C (S-VIDEO) outputs. - Page 3 PRODUCT SPECIFICATION TMC22091/TMC22191 Mask Register Colorspace Conversion Matrix and Interpolator A Mask Register is provided which is logically ANDed with incoming color-index data to facilitate pixel animation and The matrix converts RGB data (whether from RGB inputs or other special graphics effects. The Mask Register is ahead of...
- Page 4 TMC22091/TMC22191 PRODUCT SPECIFICATION MODE Format Control Register GBR444 01011000 RGB444 01010000 YC B C R 444 0101X000 YC B C R 422 0101X001 Pixel Pixel Pixel COLOR INDEX 0101X011 RGB15 01010010 GBR15 01011010 24393A and C are loaded on alternate LDV cycles Figure 1b.
- Page 5 The TMC22090 and TMC22190 are earlier versions of the maintained in power-down mode. If the HRESET bit is set TMC22091 and TMC22191, respectively. They lack the fol- lowing features of the newer versions: HIGH, line 1 field 1 is started when RESET goes HIGH, and SRESET is ignored.
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Page 6: Pin Assignments
(TEST) (TEST) (TEST) VHSYNC COMPOSITE VVSYNC LUMA CHROMA PXCK 65-3751-01 COMP GVSYNC GHSYNC CVBS Note: Pin names in parentheses apply to TMC22091. 100 Lead MQFP Name Pin Name Pin Name Pin Name COMPOSITE LUMA VHSYNC VVSYNC CHROMA COMP PXCK 65-3751-02... -
Page 7: Pin Descriptions
PRODUCT SPECIFICATION TMC22091/TMC22191 Pin Descriptions Pin Number 84-Lead 100-Lead Pin Name PLCC MQFP Value Pin Function Description Clocks PXCK Master Clock Input. This 20 to 30 MHz clock is internally divided by 2 to generate the internal pixel clock, PCK, which a LOW on RESET forces LOW. - Page 8 TMC22091/TMC22191 PRODUCT SPECIFICATION Pin Descriptions (continued) Pin Number 84-Lead 100-Lead Pin Name PLCC MQFP Value Pin Function Description 29, 48-51 97, 22-25 Overlay Data Inputs (TMC22191 only). 30 of the 256 locations of the CLUT may be reserved for overlay operation.
- Page 9 PRODUCT SPECIFICATION TMC22091/TMC22191 Pin Descriptions (continued) Pin Number 84-Lead 100-Lead Pin Name PLCC MQFP Value Pin Function Description Chip Select. When CS is HIGH, the microprocessor interface port, D , is set to HIGH impedance and ignored. When CS is LOW, the microprocessor can read or write parameters over .
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Page 10: Control Registers
Test TEST 28, 29, 22-25, 0.0 V Factory testing (TMC22091 only). Reserved for factory 48-51 96-97 testing. These pins have no effect on the operation but do function as JTAG registers. They should be grounded directly or pulled down to ground with 1kΩ or smaller resistors. - Page 11 PRODUCT SPECIFICATION TMC22091/TMC22191 Table 2. Microprocessor Port Control Table 3. Control Register Map (continued) Action Name Function Write D into Control Register FBDIS Frame buffer signals pointer disable Read Control Register pointer PDCDIR PDC master, slave on D select Write D...
- Page 12 TMC22091/TMC22191 PRODUCT SPECIFICATION Table 3. Control Register Map Table 3. Control Register Map (continued) (continued) Name Function Name Function FKEY Red/blue/C data key Front porch length value Equalization pulse LOW 08-0D Reserved length Misc. Control Register Equalization pulse HIGH length...
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Page 13: Control Register Definitions
PRODUCT SPECIFICATION TMC22091/TMC22191 Control Register Definitions Global Control Register (00) Reserved SRESET LUMDIS CHRDIS HRESET Name Function Reserved. SRESET Software reset. When LOW, resets and holds internal state machines and disables outputs. When HIGH (normal), starts and runs state machines and enables outputs. - Page 14 (TMC22191) Layering Control Register enable. When LOW, the Layering Control Register is not available and Key Control Register functions are enabled. In this mode, the TMC22191 functions like the TMC22091. When HIGH, the Layering Control Register takes the place of the Key Control Register and enables the layering functions.
- Page 15 PRODUCT SPECIFICATION TMC22091/TMC22191 Control Register Definitions (continued) Interface Control Register (02) VITSEN SHCY TBASE SOUT FBDIS PDCDIR FLDLK Name Function VITSEN VITS lines enable. When LOW, all UBB lines in the vertical interval are black burst regardless of input data. When HIGH, all UBB lines in the vertical interval become UVV active video and are dependent upon input data.
- Page 16 TMC22091/TMC22191 PRODUCT SPECIFICATION Control Register Definitions (continued) Test Control Register (03) Reserved LIMEN TESTEN HOLDEN TSTMSB LUMTST 8FSUBR CHRTST Name Function Reserved. LIMEN Luminance limiter enable. When LOW, all luminance values are passed to modulator. when HIGH, luminance values are limited to 101 IRE.
- Page 17 PRODUCT SPECIFICATION TMC22091/TMC22191 Control Register Definitions (continued) Key Control Register (04) Reserved HKEN BUKEN SKEXT DKDIS EKDIS FKDIS SKEN Name Function Reserved. HKEN Hardware key enable. When LOW, the KEY input pin ignored. When HIGH, the KEY input pin is enabled.
- Page 18 TMC22091/TMC22191 PRODUCT SPECIFICATION Control Register Definitions (continued) Layering Control Register (04) (TMC22191) LAYMODE HKEN BUKEN SKEXT LAYMODE SKEN Name Function LAYMODE MSB of Layer Assignments select. HKEN Hardware key enable. When LOW, the KEY input pin ignored. When HIGH, the KEY input pin is enabled.
- Page 19 PRODUCT SPECIFICATION TMC22091/TMC22191 Control Register Definitions (continued) Miscellaneous Control Register (0E) EFEN COMPD/A SVIDD/A FKREN RATIO TFLK T512 CB100 Name Function EFEN Register 0E and 0F enable. When LOW, the functions of Register 0E and 0F are disabled. When HIGH, Registers 0E and 0F are active. When Registers 0E and 0F are enabled, Register 00 bit 3 is ignored.
- Page 20 TMC22091/TMC22191 PRODUCT SPECIFICATION Control Register Definitions (continued) Standards Control Register (0F) EFEN SIX25 PALID SETUP YGAIN CGAIN Name Function EFEN Same as Register 0E bit 7, but read-only. SIX25 Select 625 lines per frame. When HIGH, the encoder assumes 625 line per frame.
- Page 21 PRODUCT SPECIFICATION TMC22091/TMC22191 Control Register Definitions (continued) Timing Register (18) Name Function Extended color back porch 2 MSBs. These two bits hold the MSBs of a 10-bit value extending from 0 to 1023 PCK cycles. The LSBs are located in control register 14.
- Page 22 TMC22091/TMC22191 PRODUCT SPECIFICATION Control Register Definitions (continued) Subcarrier Registers (20-27) Name Function FREQL Subcarrier frequency 4th byte (LSBs). This 8-bit register holds the LSB (bits 7-0) of the 32-bit subcarrier frequency value (non-genlock modes). The next eight most significant bits are held in Register 21.
- Page 23 Overlay Operation Color-index Modes For the TMC22091 and TMC22191 (when Format Control In color-index (CI) mode, the CLUT is used to store the Register Bit 6 = LOW), the OL inputs are inactive. In color look-up data, translating the 8-bit source pixel data into CCIR-601 operation, the nominal data range for Y is from 16 24-bit RGB colors.
- Page 24 TMC22091/TMC22191 PRODUCT SPECIFICATION Table 5. CLUT Locations Addressed by Table 5. CLUT Locations Addressed by Overlay Inputs (TMC22191) Overlay Inputs (TMC22191) (continued) CLUT location CLUT location No Overlay Color-space Conversion in the Matrix • • When the input pixels are in RGB, GBR, or color-index for- •...
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Page 25: Gamma Correction
PRODUCT SPECIFICATION TMC22091/TMC22191 Gamma Correction Table 7. Horizontal Timing Specifications NTSC-M PAL-I PAL-M Gamma is built into broadcast television systems as a correc- Parameter (µs) (µs) (µs) tion factor for nonlinearity in image acquisition (nonlinear conversion of light into current in a vidicon) and at the dis- 1.65... - Page 26 TMC22091/TMC22191 PRODUCT SPECIFICATION Burst 24318B 24319A Figure 3. Horizontal Blanking Interval Timing Figure 4. Sync and Equalization Pulse Detail Timing FIELDS 1 AND 3 VERTICAL BLANKING PRE-EQUALIZATION VERTICAL SYNC POST-EQUALIZATION VHSYNC VVSYNC COMPOSITE SYNC FIELDS 2 AND 4 VHSYNC VVSYNC...
- Page 27 PRODUCT SPECIFICATION TMC22091/TMC22191 Table 9. NTSC Field/Line Sequence and Identification Field 1 Field 2 Field 3 Field 4 FIELD ID = x00 FIELD ID = x01 FIELD ID = x10 FIELD ID = x11 Line LTYPE Line LTYPE Line LTYPE...
- Page 28 TMC22091/TMC22191 PRODUCT SPECIFICATION 1247 1248 FIELDS 1 AND 5 1249 1250 VHSYNC VVSYNC COMPOSITE SYNC FIELDS 2 AND 6 VHSYNC VVSYNC COMPOSITE SYNC FIELDS 3 AND 7 VHSYNC VVSYNC COMPOSITE SYNC FIELDS 4 AND 8 VHSYNC VVSYNC COMPOSITE SYNC 27001A...
- Page 29 PRODUCT SPECIFICATION TMC22091/TMC22191 Table 10. PAL Field/Line Sequence and Identification Field 1 Field 2 Field 3 Field 4 FIELD ID = 000, 100 FIELD ID = 001, 101 FIELD ID = 010, 110 FIELD ID = 011, 111 Line LTYPE...
- Page 30 TMC22091/TMC22191 PRODUCT SPECIFICATION FIELDS 1 AND 5 VHSYNC VVSYNC COMPOSITE SYNC FIELDS 2 AND 6 VHSYNC VVSYNC COMPOSITE SYNC FIELDS 3 AND 7 VHSYNC VVSYNC COMPOSITE SYNC FIELDS 4 AND 8 VHSYNC VVSYNC COMPOSITE SYNC 27082A Figure 7. PAL-M Vertical Interval...
- Page 31 PRODUCT SPECIFICATION TMC22091/TMC22191 Table 11. PAL-M Field/Line Sequence and Identification Field 1 Field 2 Field 3 Field 4 FIELD ID = 000, 100 FIELD ID = 001, 111 FIELD ID = 010, 110 FIELD ID = 011, 111 Line LTYPE...
- Page 32 TMC22091/TMC22191 PRODUCT SPECIFICATION Table 12. Standard Timing Parameters Timing Register (hex) Field Horizontal Pixel PXCK Rate Freq. Rate Freq. Note 1 Standard (Hz) (kHz) (Mpps) (MHz) NTSC sqr. 59.94 15.734266 12.27 24.54 pixel NTSC 59.94 15.734266 13.50 27.00 CCIR-601 NTSC 4x 59.94 15.734266...
- Page 33 PRODUCT SPECIFICATION TMC22091/TMC22191 NTSC Subcarrier PAL Subcarrier For NTSC encoding, the subcarrier synthesizer frequency The PAL relationship is more complex, repeating only once has a simple relationship to the pixel clock period, repeating in 8 fields (the well-known 25 Hz offset): over 2 lines: The decimal value is: 1135 4 ⁄...
- Page 34 TMC22091/TMC22191 PRODUCT SPECIFICATION SCH Phase Error Correction (Figure 11), the luminance component stair-step signal at the LUMA output, and the chrominance component on the SCH refers to the timing relationship between the 50% point CHROMA output. The six colors are 100% saturated PAL of the leading edge of horizontal sync and the positive or and 75% saturated for NTSC.
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Page 35: Microprocessor Interface
PRODUCT SPECIFICATION TMC22091/TMC22191 Microprocessor Interface The microprocessor interface comprises 13-lines. Two address bits provide four addresses for device programming and CLUT/register management. Address bit 0 selects between control registers and CLUT memory. Address bit 1 selects between reading/writing the register addresses and reading/writing register or CLUT data. -
Page 36: Operational Timing
TMC22091/TMC22191 PRODUCT SPECIFICATION In read mode, the address is accompanied by a HIGH on the and Blank Insert block are monitored. When the Control R/W pin during a falling edge of CS. The data output pins go Register pointer is loaded with 60... - Page 37 PRODUCT SPECIFICATION TMC22091/TMC22191 t PWHPX t PWLPX 2N+1 2N+2 2N+3 PXCK t SP t PWLVH VHSYNC (GHSYNC) t XL t PWHLDV t PWLLDV t SP t HP 24340A Figure 13. Slave Mode PD Port Interface Timing (Genlock Mode) PXCK RESET...
- Page 38 TMC22091/TMC22191 PRODUCT SPECIFICATION PXCK VHSYNC 1 VVSYNC 1 for field 1 COMPOSITE OUTPUT 50% Sync Amplitude 24355A Figure 15. Slave Mode Timing PXCK GHSYNC VHSYNC COMPOSITE OUTPUT 50% Sync Amplitude 24356A Figure 16. Genlocked Mode Timing Genlocked Mode The position (number of PCK cycles) of the rising edge of...
- Page 39 PRODUCT SPECIFICATION TMC22091/TMC22191 PXCK P 19 P 20 P 21 P 22 P 23 P 24 COMPOSITE OUTPUT PI 1 P 2 PI 2 P 3 POST-FILTER OUTPUT 24358A Figure 17. External Pixel Data Control Internal Pixel Data Control Pixels produced by the encoder appear at the analog outputs...
- Page 40 TMC22091/TMC22191 PRODUCT SPECIFICATION Layering with the TMC22191 A 4-Layer Example For this layering example, a BACKGROUND image is Layering is a video production process where various images generated. This image comprises shaded matte levels varying or patterns are superimposed (keyed) over each other to form from black at the top of the screen to white at the bottom.
- Page 41 PRODUCT SPECIFICATION TMC22091/TMC22191 2-LAYER COMPOSITE 3-LAYER COMPOSITE HI KIDS ! HI KIDS ! FOREGROUND HI KIDS ! 27037A Figure 20. Adding a 3rd Layer A DOWNSTREAM KEY image comprises the white alpha In this illustration, all four source images are static (not mov- characters "HAPPY FACE", and black alpha characters...
- Page 42 Data Key. The first two layers in the previous 4-Layer modes of the Layering Control Register. OVERLAY is Example apply to the TMC22091. The result of keying is an always keyed (switched on a pixel-by-pixel basis from active effect where a MIDGROUND source image (i.e. Happy Face to transparent) by the OL inputs.
- Page 43 PRODUCT SPECIFICATION TMC22091/TMC22191 Hardware Keying Key Control Register bit 5 HIGH. In this mode, KEY is always active, and may be exercised at will. The KEY input switches the COMPOSITE D/A converter input from the luminance and chrominance combiner output The KEY input is registered into the encoder just like Pixel to the CVBS data bus on a pixel-by-pixel basis.
- Page 44 TMC22091/TMC22191 PRODUCT SPECIFICATION Genlock Interface The TMC22x91 can process digital composite video Subcarrier frequency and phase data are transmitted to the connected to its CVBS port. It has been designed to couple encoder over the CVBS bus as 4-bit nibbles on CVBS tightly with the companion TMC22071 Genlocking Video during the horizontal sync period.
- Page 45 PRODUCT SPECIFICATION TMC22091/TMC22191 PXCK GHSYNC φ φ φ φ φ φ CVBS 7-0 FID f PIXEL PIXEL PIXEL PIXEL PIXEL 23:20 19:16 15:12 11:8 23:20 19:16 15:12 11:8 FREQUENCY PHASE 24383A FIELD IDENTIFICATION Figure 25. Frequency/Phase Data Transfer Filtering Since these are fixed-coefficient digital filters, their filter characteristics depend upon clock rate.
- Page 46 flat to f /4 and have good rejection at 3f /4. The relaxed of the TMC22091 function as JTAG registers. requirements greatly simplify the design of a filter with good phase response and low group delay distortion. A small The JTAG port is a 4-line interface, following IEEE Std.
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Page 47: Equivalent Circuits
PRODUCT SPECIFICATION TMC22091/TMC22191 t PWLTCK t PWHTCK t STP t HTP t DOTP t HOTP 24333A Figure 29. JTAG Test Port Timing Equivalent Circuits n Substrate COMPOSITE LUMA CHROMA 27012A 27013A Figure 30. Equivalent Analog Input Circuit Figure 31. Equivalent Analog Output Circuit... -
Page 48: Absolute Maximum Ratings
TMC22091/TMC22191 PRODUCT SPECIFICATION t DOM t DOZ t HOM 0.5V 2.0V Hi-Z D 7-0 0.8V 27029A 0.5V Figure 34. Transition Levels for Three-State Measurements Absolute Maximum Ratings (beyond which the device may be damaged) Parameter Min. Max. Unit Power Supply Voltage -0.5... -
Page 49: Operating Conditions
PRODUCT SPECIFICATION TMC22091/TMC22191 Operating Conditions Parameter Min. Nom. Max. Units Power Supply Voltage 4.75 5.25 Input Voltage, Logic HIGH TTL Compatible Inputs, all but TCK TTL Compatible Input TCK CMOS Compatible Inputs (2/3)V Input Voltage, Logic LOW TTL Compatible Inputs... -
Page 50: Electrical Characteristics
TMC22091/TMC22191 PRODUCT SPECIFICATION Operating Conditions (continued) Parameter Min. Nom. Max. Units Reset Setup Time Reset Hold Time JTAG Interface Test Clock (TCK) Rate TCK Pulse Width, LOW PWLTCK TCK Pulse Width, HIGH PWHTCK Test Port Setup Time, TDI, TMS Test Port Hold Time, TDI, TMS Note: 1. -
Page 51: Switching Characteristics
PRODUCT SPECIFICATION TMC22091/TMC22191 Switching Characteristics Parameter Conditions Min. Typ. Max. Units PIPES Pipeline Delay PD to Analog Out PXCK periods Output Delay, CS to low-Z Output Delay, CS to Data Valid Output Hold Time, CS to hi-Z Output Delay, TCK to TDO Valid... - Page 52 TMC22091/TMC22191 PRODUCT SPECIFICATION Video Video from Output 1.8µH Encoder 75Ω IN5818 75Ω 27pF 47 µF 47 µF Ω 1.0µH 330pF 330pF 0.1 µF 0.1 µF BYPASS and OL 4-0 on TMC22191 only. OL 4-0 V DO D GND A GND...
- Page 53 PRODUCT SPECIFICATION TMC22091/TMC22191 CVBS 7-0 CVBS 7-0 GHSYNC GHSYNC GVSYNC GVSYNC PXCK PXCK TMC22071 TMC22x91 GENLOCKING VIDEO DIGITIZER DIGITAL VIDEO ENCODER MICROPROCESSOR 27009A INTERFACE Figure 37. TMC22x91-to-TMC22071 Interface Circuit Printed Circuit Board Layout Microprocessor I/O Operations Designing with high-performance mixed-signal circuits Various CLUT Read/Write operations are shown in Table 17.
- Page 54 TMC22091/TMC22191 PRODUCT SPECIFICATION Table 17. CLUT Read/Write Sequences Step R/W\ Function Write Entire CLUT Starting at Address 00 Write 00 into CLUT Address Register. Write 00 into CLUT Address Register. d1 written into D, CLUT address 00. e1 written into E, CLUT address 00.
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Page 55: Related Products
PRODUCT SPECIFICATION TMC22091/TMC22191 Table 17. CLUT Read/Write Sequences (continued) Step R/W\ Function Read/Modify/Write CLUT Location address addr Write addr into the CLUT Address Register. Set up for CLUT Read. d1 read from D, CLUT address addr. e1 read from E, CLUT address addr. - Page 56 TMC22091/TMC22191 PRODUCT SPECIFICATION Notes:...
- Page 57 PRODUCT SPECIFICATION TMC22091/TMC22191 Notes:...
- Page 58 TMC22091/TMC22191 PRODUCT SPECIFICATION Mechanical Dimensions – 84-Lead PLCC Package Notes: Inches Millimeters Symbol Notes All dimensions and tolerances conform to ANSI Y14.5M-1982. Min. Max. Min. Max. Corner and edge chamfer = 45°. .165 .200 4.19 5.08 Dimension D1 and E1 do not include mold protrusion. Allowable .090...
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Page 59: Mechanical Dimensions
PRODUCT SPECIFICATION TMC22091/TMC22191 Mechanical Dimensions 100 Lead MQFP Package – 3.2mm Footprint Notes: Inches Millimeters Symbol Notes All dimensions and tolerances conform to ANSI Y14.5M-1982. Min. Max. Min. Max. Controlling dimension is millimeters. — .134 — 3.40 Dimension "B" does not include dambar protrusion. Allowable .010... -
Page 60: Ordering Information
TMC22091/TMC22191 PRODUCT SPECIFICATION Ordering Information Product Number Temperature Range Screening Package Package Marking TMC22091KHC = 0°C to 70°C Commercial 100-Lead MQFP 22091KHC TMC22091R0C = 0°C to 70°C Commercial 84-Lead PLCC 22091R0C TMC22191KHC = 0°C to 70°C Commercial 100-Lead MQFP 22191KHC TMC22191R0C = 0°C to 70°C...