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J1
Pin Use on base board
220 NC
221 USB_DEV_OC
222 NC
223 USB_DEV_ID
224 GND
225 USB_DEV_N
226 NC
227 USB_DEV_P
228 NC
229 GND
230 GND
O5:
I:
Idiff, Odiff, I/Odiff:
PWR:
*:
(*):
#:
X at column 1.12->1.20 change:
I/O
Remarks; onboard pullups
I*
I
100k pull up
PWR
I/Odiff
I/Odiff
PWR
PWR
Table 1: 230 pin goldfinger connector
3.3V 5mA logic output
3.3V logic input
differential signal
Power input or output
SW configurable as GPIO; 3.3V logic level
2.8V logic level, SW configurable as GPIO; driving 3.3V logic level on
this pin will destroy CPU!
not available in all mounting options
CPU IO pin is changed for this function. Only supported
with SW built for HW Rev 1.20
Hardware Documentation efus™A9X+ efus™A9Xr2
1.12->
1.20
change
| 14
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