Motorola MTR2000 Manual page 102

HOST MICROPROCESSOR
12
HOST DATA BUS
HOST ADDRESS BUS
128K X 8
A0 – A18
FLASH
A15 – A17
RESET*
RESET*
RESET
WDOG
CIRCUITRY
1.2 MHz
IN
SPI I/O CIRCUITRY
HOST
MICROPROCESSOR
(PART OF 68356)
HOST SPI BUS
SPI
3
D
SERIAL ID IN*
TO
FLASH PWR EN* SUPPLY VOLTAGE
CIRCUITRY
PB8
FROM
BACKPLANE
SERIAL I/O CIRCUITRY
AC FAIL
PB0
SCC2
OPT IRQ*
PB9
INTER-PROCESSOR SERIAL
EXT PTT*
COMMUNICATIONS I/F
PB1
SCC1
PB10
WL DC CONTROL REQ*
AUDIO PROCESSING CONTROL BUS
A
B
D0 – D7
BUFFER
HOST MASTER DATA BUS
RAM
RP*
PARALLEL I/O CHIP SELECTS
C
1-OF-8
5
CS LATCH*
DEMUX
RESET*
TO BACKPLANE,
RESET*
PARALLEL I/O AND
AUDIO PROCESSING
CIRCUITRY
1.2 MHz CLOCK
INTERNAL SPI BUS (MOSI/SPI CLK)
2
SPI CLK/
MOSI
BUFFERS
MISO GATE
HOST MISO
SPI CLK
DATA IN
A/D
WIRELINE ID
DATA OUT
WL DC CONTROL
SPI CLK
MIC PTT*
EXT. (MIC) SWITCHES
EIA–232
TRANSCEIVER
6 6
OPTION1 SCI
NON-INVERTING
OPTION2 SCI
BUFFERS
2
SCC1 CS*
DIGITAL SIGNAL PROCESSOR (DSP) / DSP ASIC
16
A0 – A15
DIGITAL
SIGNAL
PROCESSOR
(DSP)
(PART OF 68356)
VCC
DRESET*
2
TO/FROM
BACKPLANE
TO/FROM
EXCITER MODULE
2
TO/FROM
RECEIVER MODULE
INTERNAL MISO
PTEMP+
OPTION1 ID
OPTION2 ID FROM
BACKPLANE
SCM VERSION
P5602
TO MICROPHONE CONNECTOR
(8-PIN TELCO CONNECTOR
ON FRONT OF SCM)
P5600
RSS PORT
(8-PIN TELCO CONNECTOR
ON FRONT OF SCM)
TO OPTION BOARDS
(VIA BACKPLANE)
E
STATION CONTROL MODULE
DSP ADDRESS BUS
A0 – A3, A15
DSP DATA BUS
D0 – D23
D8 – D23
32K X 8
CODEC I/F
RAM
D0 – D7
VCC
32K X 8
CLK_RSTX
RAM
D8 – D15
DSP
ASIC
32K X 8
RAM
D16 – D23
ABA_IRQ*
CODEC_IRQ*
RESETX
1.2 MHz
OUT
INTERNAL SPI BUS (MOSI/SPI CLK)
STATION REFERENCE CIRCUITRY
2.1 MHz FROM DSP ASIC
SPI BUS
HIGH
STABILITY VCO
3 (CMAC)
STATION CONTROL MODULE FUNCTIONAL BLOCK DIAGRAM
MODEL TCN6273N
DIFFERENTIAL DATA
DIFFERENTIAL-TO-TTL
FROM
CONVERTER/BUFFER
RECEIVER MODULE
TO
RX
WIB CODEC(S)
PCM CODEC BUS
VIA
BACKPLANE
AND WIB
(CLEAR AUDIO ONLY)
PCM CODEC BUS
PCM F
RECEIVER SERIAL BUS
TO/FROM
ODC/SBI
RECEIVE MODULE
2
RSSI DATA
I
RSSI
7
16.8 MHz TO DSP ASIC
16.8 MHz
IN
TO
2.1 MHz 2.1 MHz
SUPPLY
OUT
VOLTAGE
CIRCUITRY
J
2.1 MHz REF
TO EXCITER MODULE
BUFFER/
SPLITTER
2.1 MHz REF
TO RECEIVER MODULE
16.8 MHz TO DSP ASIC
68P81094E31-I
Schematics (Sheet 3 of 36)
7/28/2007