LG 49UF771V Service Manual page 37

Table of Contents

Advertisement

IC102-*1
BR24G256FJ-3
NVRAM
+3.3V_NORMAL
A0
VCC
1
8
A1
2
7
WP
A2
SCL
Atmel_NVRAM
3
6
GND
SDA
IC102
4
5
AT24C256C-SSHL-T
C103
Rohm_NVRAM
0.1uF
EAN61133501
Write Protection
- Low
: Normal Operation
A0
VCC
- High : Write Protection
1
8
A1
WP
2
7
AR100
33
A0'h
A2
SCL
3
6
I2C_SCL1
I2C_SDA1
GND
SDA
4
5
SPI_CK_SOC
LM15U+URSA9
LOCKAn_OSD
SPI_DI_SOC
URSA9_CONNECT
SPI_DO_SOC
/SPI_CS
L/D_VSYNC_SOC
CHIP_CONFIG[3:0]
L/D_CLK_SOC
FRC_FLASH_SEL
{LED1, SPI_DI,LED0, PWM_PM}
L/D_DI_SOC
FRC_FLASH_WP
Value
URSA_RESET_SoC
4'b1000 SB51_ExtSPI
TXOSD_3P
4'b1001 HEMCU_ExtSPI
TXOSD_3N
4'b1010 HEMCU_ROM_EMMC
TXOSD_2P
4'b1011 HEMCU_ROM_NAND
4'b1100 DBUS
TXOSD_2N
4'b0000 SB51_ExtSPI + Authentication 51 boot from SPI with ARM authentication
TXOSD_1P
4'b0001 SB51_ExtSPI + Authentication HEMCU_ExtSPI + Authentication
4'b0011 HEMCU_ROM_NAND + Authentication ARM boot from ROM with authentication;
TXOSD_1N
TXOSD_0P
TXOSD_0N
OLED
COMPENSATION_DONE
DATA_FORMAT_1_SOC
FAN_ON
DATA_FORMAT_0_SOC
LM15U HW Option
+3.3V_NORMAL
BIT0
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
BIT8
BIT9
BIT10
BIT11
BIT12
BIT13
20140701 version
BIT(0/1)
DVB
ATSC
JP
00
TW/COL
US
01
CN/HK
KR
JP
10
EU
BR/PH
11
AJJA
Sri Lanka
BIT(7/8)
B/E(FRC)
Low
High
00
NONE
01
BIT4
Display
LCD
OLED
URSA9
BIT5
Resolution
FHD
UHD
10
URSA11-P
BIT6
Model
LM15U only
LM15U+URSA
11
URSA11
Mstart Debug
MSTAR_DEBUG_OLD
P103
MSTAR_DEBUG_NEW
12505WS-04A00
P101
12507WS-04L
1
1
2
2
3
DDCA_CK
3
4
DDCA_DA
4
5
5
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
+3.3V_NORMAL
CHIP CONFIG
LED1
SPI_DI_SOC
PWM_DIM
LED0
PWM_DIM2
PWM_PM
FAN_ON
AMP_RESET_N
M_RFModule_RESET
PWM_PM
/USB_OCD2
USB_CTL2
SPI_CK_SOC
Mode
Description
51 boot from SPI
SPI_DI_SOC
ARM boot from SPI
SPI_DO_SOC
ARM boot from ROM; outer storage is eMMC
ARM boot from ROM; outer storage is NAND
for test only
/SPI_CS
DDCA_CK
+3.3V_NORMAL
DDCA_DA
LM15U_ONLY
OPT
R155
FRC_FLASH_SEL
SOC_TX
4.7K
R167
SOC_RX
0
FRC_FLASH_SEL
/TU_RESET2
+3.3V_NORMAL
I2C_SCL6
R126
I2C_SDA6
10K
OPT
DDTS_TX
FRC_FLASH_WP
DDTS_RX
R179
10K
U_SPI_WP_f_SoC
/TU_RESET1
URSA_RESET_SoC
COMPENSATION_DONE
BIT0
BIT1
BIT2
BIT3
BIT4
BIT12
BIT13
I2C_SCL3
I2C_SDA3
I2C_SCL1
I2C_SDA1
AVDD_3P3
CPU_VID0
CORE_VID0
WOL_WAKE_UP
LED0
R131
10K
LED1
WOL_WAKE_UP
BIT(2/3)
EU/CIS
AJJA
TW/COL
CN/HK
KR
North.AM
00
T2/C/S2 PIP
T2/C PIP
T2/C PIP
Default
ATSC NIM+T2
Default
01
T2/C/S2
T2/C/S2
T2/C
ATSC+T2
T/C
10
T/C
T
ATSC
11
T2
ATSC PIP
+3.3V_LNA_TU
RS232C_Debug
+3.3V_TU
UART_4PIN_WAFER
+3.5V_ST
P102
12507WS-04L
1
2
SOC_RX
3
4
SOC_TX
5
IC100
V-BY-ONE
LGE5331(LM15U)
A16
AB36
TXVBY1_0N
PWM0/GPIO157
LVSYNC/VBY0M
C15
AB35
TXVBY1_0P
PWM1/GPIO158
LHSYNC/VBY0P
A15
AC36
TXVBY1_1N
PWM2/GPIO159
LDE/VBY1M
B15
AC37
TXVBY1_1P
PWM3/GPIO160
LCK/VBY1P
C14
PWM4/GPIO161
E4
AD37
TXVBY1_2N
PWM_PM/GPIO10
B0M/VBY2M
AD36
TXVBY1_2P
B0P/VBY2P
H6
AD35
TXVBY1_3N
SAR0/GPIO50
B1M/VBY3M
J6
AE36
TXVBY1_3P
SAR1/GPIO51
B1P/VBY3P
G5
AF36
TXVBY1_4N
SAR2/GPIO52
B2M/VBY4M
J5
AF37
TXVBY1_4P
SAR3/GPIO53
B2P/VBY4P
D1
AF35
TXVBY1_5N
SAR5
BCKM/VBY5M
AG37
TXVBY1_5P
BCKP/VBY5P
D2
AG35
TXVBY1_6N
SPI_CK/GPIO1
B3M/VBY6M
D3
AH36
TXVBY1_6P
SPI_DI/GPIO2
B3P/VBY6P
E2
AH35
TXVBY1_7N
SPI_DO/GPIO3
B4M/VBY7M
F1
AJ36
R168
TXVBY1_7P
SPI_CZ0/GPIO0
B4M/VBY7P
0
E3
SPI_CZ1/GPIO_PM6/GPIO19
F2
AJ35
TXOSD_0N
OPT
SPI_CZ2/GPIO_PM10/GPIO23
A0M/VBY_OSD_0M
AK37
TXOSD_0P
A0P/VBY_OSD_0P
AK36
TXOSD_1N
A1M/VBY_OSD_1M
N5
AK35
TXOSD_1P
DDCA_CK/UART0_RX/GPIO11
A1P/VBY_OSD_1P
P5
AL35
TXOSD_2N
DDCA_DA/UART0_TX/GPIO12
A2M/VBY_OSD_2M
AM36
TXOSD_2P
A2P/VBY_OSD_2P
C9
AM37
TXOSD_3N
GPIO67/TX1
ACKM/VBY_OSD_3M
A10
AM35
TXOSD_3P
GPIO68/RX1
ACKP/VBY_OSD_3P
E9
AJ33
GPIO69/TX2
A3M/LOCKN
LOCKAn_Video
F9
AJ34
HTPDAn_Video
GPIO70/RX2
A3P/HTPDN
F10
AJ32
GPIO71/TX3
A4M/OSD_LOCKN
LOCKAn_OSD
G10
AJ31
GPIO72/RX3
HTPDAn_OSD
A4P/OSD_HTPDN
D9
R173
R172
GPIO76/TX4
M7
10K
10K
GPIO77/RX4
P6
+3.3V_NORMAL
GPIO94/TX5
N6
GPIO95/RX5
A12
GPIO62
A13
GPIO63
C12
GPIO64
B12
GPIO65
C11
GPIO66
B10
HTPDAn_Video
GPIO73
C10
GPIO74
HTPDAn_OSD
B11
B
GPIO75
KEC_VBY1_LOCK_LED_TR
F6
AD5
OPT
COMP1_DET
GPIO81/TX2
GPIO_PM0/GPIO13
F5
AD6
0
R180
3D_EN
GPIO82/RX2
GPIO_PM2/GPIO15
AE2
AV2_CVBS_DET
GPIO_PM3/GPIO16
AE3
PCM_5V_CTL
GPIO_PM4/GPIO17
AF4
GPIO_PM7/GPIO20
K6
AG5
5V_DET_HDMI_1
GPIO88/SCK0
GPIO_PM8/GPIO21
L7
AG6
GPIO89/SDA0
GPIO_PM9/GPIO22
5V_DET_HDMI_2
C16
AH6
5V_DET_HDMI_3
DDCR_CK/GPIO59
GPIO_PM13/GPIO26
B16
AJ5
BIT7
DDCR_DA/GPIO58
GPIO_PM17/GPIO30
AJ4
BIT8
GPIO_PM18/GPIO31
K5
GPIO_PM1/GPIO14
/USB_OCD3
D5
L6
VID0/GPIO55
GPIO_PM5/GPIO18
USB_CTL3
D4
M5
DATA_FORMAT_0_SOC
VID1/GPIO56
GPIO_PM11/GPIO24
H4
M6
URSA9_CONNECT
DATA_FORMAT_1_SOC
LED0/GPIO32
GPIO_PM12/GPIO25
H5
LED1/GPIO33
0
R187
L5
L4
WOL/GPIO57
AV_LNK/GPIO9
J15
WOL_WAKE_UP
TEST
A18
GPIO112/SPI1_DI
BIT5
B18
BIT6
GPIO111/SPI1_CK
C17
GPIO114/SPI2_DI
L/D_DI_SOC
B17
GPIO113/SPI2_CK
L/D_CLK_SOC
C18
L/D_VSYNC_SOC
GPIO110/VSYNC_LIKE
D18
BIT11
GPIO115/DIM0
E18
AV1_CVBS_DET
GPIO116/DIM1
F18
GPIO117/DIM2
HP_DET
E17
SC_DET
GPIO118/DIM3
High
Low
Support
EXTERNAL EDID
BIT9
EXTERNAL
NON_EXTERNAL
BR
JP
FOR HDMI2.0
ISDB PIP
Default
BIT10
Division
NON_Division
4_Division
ISDB EXT
BIT11
CI+
Old CI Path
New CI Path
VID Enable
VID Disable
ISDB INT
BIT12
VID
BIT13
Reserved
I2C PULL UP
+3.3V_NORMAL
I2C_SDA7
I2C for URSA9 (URSA9 Only)
I2C_SCL7
I2C_SDA6
I2C for LCD Module
I2C_SCL6
I2C_SDA1
I2C for NAVRAM
I2C_SCL1
I2C_SDA3
I2C for Micom
I2C_SCL3
I2C_SDA4
I2C for Main Amp / Woofer AMP
I2C_SCL4
I2C_SDA5
I2C for tuner
I2C_SCL5
I2C_SDA2
I2C for tuner&LNB
I2C_SCL2
AR101
33
I2C_SDA_MICOM
I2C_SDA3
I2C_SCL_MICOM
I2C_SCL3
IC100
LGE5331(LM15U)
EB_DATA[0-7]
EB_DATA[0]
AT13
PCMDATA[0]/GPIO152
TS1DATA_[0]/GPIO187
EB_DATA[1]
AT9
PCMDATA[1]/GPIO153
TS1DATA_[1]/GPIO186
EB_DATA[2]
AR13
PCMDATA[2]/GPIO154
TS1DATA_[2]/GPIO185
EB_DATA[3]
AT17
PCMDATA[3]/GPIO124
TS1DATA_[3]/GPIO184
EB_DATA[4]
AR16
PCMDATA[4]/GPIO125
TS1DATA_[4]/GPIO183
EB_DATA[5]
AT16
PCMDATA[5]/GPIO126
TS1DATA_[5]/GPIO182
AR21
EB_DATA[6]
PCMDATA[6]/GPIO127
TS1DATA_[6]/GPIO181
AT18
EB_ADDR[0-14]
EB_DATA[7]
PCMDATA[7]/GPIO128
TS1DATA_[7]/GPIO180
TS1CLK/GPIO177
EB_ADDR[0]
AU10
PCMADR[0]/GPIO151
TS1VALID/GPIO179
EB_ADDR[1]
AT14
PCMADR[1]/GPIO150
TS1SYNC/GPIO178
EB_ADDR[2]
AR10
PCMADR[2]/GPIO148
EB_ADDR[3]
AT19
PCMADR[3]/GPIO147
TS0DATA_[0]/GPIO166
EB_ADDR[4]
AR18
PCMADR[4]/GPIO146
TS0DATA_[1]/GPIO167
EB_ADDR[5]
AU19
PCMADR[5]/GPIO144
TS0DATA_[2]/GPIO168
EB_ADDR[6]
AT11
EB_ADDR[7]
PCMADR[6]/GPIO143
TS0DATA_[3]/GPIO169
AT12
PCMADR[7]/GPIO142
TS0DATA_[4]/GPIO170
EB_ADDR[8]
AT20
EB_ADDR[9]
PCMADR[8]/GPIO136
TS0DATA_[5]/GPIO171
AU14
PCMADR[9]/GPIO134
TS0DATA_[6]/GPIO172
EB_ADDR[10]
AU16
C
EB_ADDR[11]
PCMADR[10]/GPIO130
TS0DATA_[7]/GPIO173
AR20
NXP_VBY1_LOCK_LED_TR
PCMADR[11]/GPIO132
TS0CLK/GPIO176
B
Q100-*1
EB_ADDR[12]
AR12
MMBT3906(NXP)
PCMADR[12]/GPIO141
TS0VALID/GPIO174
EB_ADDR[13]
AU13
PCMADR[13]/GPIO137
TS0SYNC/GPIO175
EB_ADDR[14]
E
AR19
PCMADR[14]/GPIO138
TS2DATA_[0]/GPIO200
AU20
CAM_IREQ_N
PCMIRQA/GPIO140
TS2DATA_[1]/GPIO204
AT21
EB_OE_N
PCMOEN/GPIO131
TS2DATA_[2]/GPIO205
AR15
EB_BE_N1
PCMIORD/GPIO133
TS2DATA_[3]/GPIO206
AU17
/PCM_CE1
PCMCEN/GPIO129
TS2DATA_[4]/GPIO207
AR11
EB_WE_N
PCMWEN/GPIO139
TS2DATA_[5]/GPIO208
AR17
CAM_CD1_N
PCMCD/GPIO156
TS2DATA_[6]/GPIO209
AU11
PCM_RESET
PCMRST/GPIO155
TS2DATA_[7]/VSENSE/GPIO210
AR14
CAM_REG_N
PCMREG/GPIO149
TS2CLK/GPIO203
AT15
EB_BE_N0
PCMIOWR/GPIO135
TS2VALID/GPIO201
AT10
CAM_WAIT_N
PCMWAIT/GPIO145
TS2SYNC/GPIO202
D7
NAND_ALE/GPIO194
TS3DATA_[0]/GPIO211
F7
NAND_WPZ/GPIO193
TS3DATA_[1]/GPIO212
G7
EMMC_CMD
NAND_CEZ/EMMC_CMD/GPIO188
TS3DATA_[2]/GPIO213
E6
NAND_CLE/GPIO190
TS3DATA_[3]/GPIO214
F8
E
Q100
EMMC_CLK
NAND_REZ/EMMC_CLK/GPIO191
TS3DATA_[4]/GPIO215
E7
2N3906S-RTK
NAND_WEZ/GPIO192
TS3DATA_[5]/GPIO216
E8
EMMC_RST
NAND_RBZ/EMMC_RSTN/GPIO195
TS3DATA_[6]/GPIO217
D6
C
NAND_CEZ1/GPIO189
TS3DATA_[7]/GPIO218
D8
EMMC_STRB
NAND_DQS/GPIO196
TS3CLK/GPIO221
EMMC_DATA[0-7]
TS3VALID/GPIO219
TS3SYNC/GPIO220
R175
EMMC_DATA[6]
A6
22
NAND_AD0/EMMC_D6/GPIO226
EMMC_DATA[7]
TCON_I2C_EN
C6
NAND_AD1/EMMC_D7/GPIO225
EMMC_DATA[2]
A7
NAND_AD2/EMMC_D2/GPIO224
EMMC_DATA[1]
B7
NAND_AD3/EMMC_D1/GPIO223
EMMC_DATA[0]
C7
NAND_AD4/EMMC_D0/GPIO199
EMMC_DATA[3]
B8
NAND_AD5/EMMC_D3/GPIO198
C8
EMMC_DATA[4]
+3.3V_NORMAL
NAND_AD6/EMMC_D4/GPIO197
B9
EMMC_DATA[5]
NAND_AD7/EMMC_D5/GPIO227
R177
10K
R174 0
OPT
AM4
PCM2_CD/GPIO123
AP4
R178
RF_SWITCH_CTL
PCM2_CE/GPIO119
TGPIO0/GPIO162
10K
AL5
OPT
PCM2_IRQA/GPIO120
TGPIO1/GPIO163
AN4
PCM2_WAIT/GPIO121
TGPIO2/GPIO164
AL4
PCM2_RESET/GPIO122
TGPIO3/GPIO165
OPT
0
R191
L_DIM_EN
BIT9
BIT10
GPIO PULL UP
+3.3V_NORMAL
/TU_RESET1
RF_SWITCH_CTL
AMP_RESET_N
TCON_I2C_EN
/USB_OCD1
USB_CTL1
/USB_OCD2
USB_CTL2
M_RFModule_RESET
PCM_5V_CTL
TPO_DATA[0-7]
AL6
TPO_DATA[0]
AM6
TPO_DATA[1]
AP8
TPO_DATA[2]
AN7
TPO_DATA[3]
AM5
TPO_DATA[4]
AM7
TPO_DATA[5]
AN5
TPO_DATA[6]
AN6
TPO_DATA[7]
AL7
TPO_CLK
AP5
TPO_VAL
AP6
TPO_SOP
FE_DEMOD1_TS_DATA[0-7]
AP10
FE_DEMOD1_TS_DATA[0]
AN10
FE_DEMOD1_TS_DATA[1]
AM8
FE_DEMOD1_TS_DATA[2]
AM10
FE_DEMOD1_TS_DATA[3]
AM11
FE_DEMOD1_TS_DATA[4]
AM12
FE_DEMOD1_TS_DATA[5]
AN8
FE_DEMOD1_TS_DATA[6]
AM9
FE_DEMOD1_TS_DATA[7]
AN11
FE_DEMOD1_TS_CLK
AN9
FE_DEMOD1_TS_VAL
AP9
FE_DEMOD1_TS_SYNC
AM14
FE_DEMOD3_TS_DATA
AP15
AN12
AN15
AN14
AM16
AN13
AM15
AP13
FE_DEMOD3_TS_CLK
AP12
FE_DEMOD3_TS_VAL
AM13
FE_DEMOD3_TS_SYNC
TPI_DATA[0-7]
AM18
TPI_DATA[0-7]
AP16
TPI_DATA[0]
AM19
TPI_DATA[1]
AN18
TPI_DATA[2]
AP19
TPI_DATA[3]
AN20
TPI_DATA[4]
AP18
TPI_DATA[5]
TPI_DATA[6]
AN19
TPI_DATA[7]
AN17
TPI_CLK
AM17
TPI_VAL
AN16
TPI_SOP
AP1
VIFP
AP2
VIFM
Close to MSTAR
DTV_IF
AN2
SIFP
AN1
SIFM
R140
100
C118
0.1uF
OPT
C122
AP3
100pF
IF_AGC
AR2
/USB_OCD1
R141
100
C119
0.1uF
OPT
AM2
C123
USB_CTL1
33pF
AK5
I2C_SCL7
AK6
I2C_SDA7
C120
0.1uF
R144 47
C121
0.1uF
R145 47
R146
C124
300
1000pF
ANALOG SIF
OPT
OPT
Close to MSTAR
+3.3V_NORMAL
L100
PZ1608U121-2R0TF
C125
R142
0.1uF
10K
R143
0
C127
0.047uF
25V
DDTS_Debug
+3.3V_NORMAL
DDTS_Debug
P100
12507WS-04L
1
2
DDTS_RX
3
4
DDTS_TX
5
LM15U
2014-12-17
MAIN1_SYSTEM
1
LGE Internal Use Only
IF_P
IF_N
OPT
C126
33pF
TU_SIF
IF_AGC

Advertisement

Table of Contents
loading

Table of Contents