Advertisement
Quick Links
N a t i o n a l
COP820CJ/COP822CJ/COP823CJ
Single-Chip microCMOS Microcontroller
G e n e ra l D e s c rip tio n
The COP820CJ is a member of the COPS™ 8-bit Microcon-
troller family. It is a fully static Microcontroller, fabricated
using double-metal silicon gate microCMOS technology.
This low cost Microcontroller is a complete microcomputer
containing all system timing, interrupt logic, ROM, RAM, and
I/O necessary to implement dedicated control functions in a
variety of applications. Features include an 8-bit memory
mapped architecture,
MICROWIRE
timer/counter with capture register, a multi-sourced inter-
rupt, Comparator,
WATCHDOG
Brown out protection and Multi-Input Wakeup. Each I/O pin
has software selectable options to adapt the device to the
specific application. The device operates over a voltage
range of 2.5V to 6.0V. High throughput is achieved with an
efficient, regular instruction set operating at a 1 jus per in
struction rate.
F e a tu re s
■ Low cost 8-bit Microcontroller
n Fully static CMOS
n 1 jus instruction time
■ Low current drain
— Low current static HALT mode
■ Single supply operation: 2.5V to 6.0V
■ 1024 x 8 on-chip ROM
B lo ck D ia g ra m
S e m i c o n d u c t o r
serial I/O, a 16-bit
tm
Timer, Modulator/Timer,
tm
FIGURE 1. Block Diagram
1-50
64 bytes on-chip RAM
■
WATCHDOG Timer
Comparator
Modulator/Timer (High speed PWM Timer for IR
"
Transmission)
Multi-Input Wakeup (on the 8-bit Port L)
■
Brown Out Protection
■
■
4 high current I/O pins with 15 mA sink capability
MICROWIRE/PLUS
serial I/O
■
tm
B
16-bit read/write timer operates in a variety of modes
— Timer with 16-bit auto reload register
— 16-bit external event counter
— Timer with 16-bit capture register (selectable edge)
■ Multi-source interrupt
— External interrupt with selectable edge
— Timer interrupt or capture interrupt
— Software interrupt
■ 8-bit stack pointer (stack in RAM)
■ Powerful instruction set, most instructions single byte
■ BCD arithmetic instructions
■ 28- and 20-pin DIP/SO package or 16-pin SO package
■ Software selectable I/O options (TRI-STATE®, push-
pull, weak pull-up)
■ Schmitt trigger inputs on Port G and Port L
■ Fully supported by MetaLink's development systems
■ One-Time Programmable (OTP) emulator devices
P R E L IM IN A R Y
T L /D D /1 1208-1
Advertisement
Related Manuals for National Semiconductor COP820CJ
Summary of Contents for National Semiconductor COP820CJ
- Page 1 G e n e ra l D e s c rip tio n ■ WATCHDOG Timer The COP820CJ is a member of the COPS™ 8-bit Microcon- Comparator troller family. It is a fully static Microcontroller, fabricated Modulator/Timer (High speed PWM Timer for IR using double-metal silicon gate microCMOS technology.
-
Page 2: Input Levels
A b s o lu te M axim u m R atin g s If Military/Aerospace specified devices are required, Total Current out of GND pin (sink) 80 mA please contact the National Semiconductor Sales Storage T emperature Range — 65'C to + 1 50°C Office/Dlstributors for availability and specifications. - Page 3 DC E le c tric a l C h a ra c te ris tic s —40°C ^ T ^ + 85°C unless otherwise specified (Continued) Parameter Conditions Units Maximum Input Current Room Temperature ±100 without Latchup (Note 4) RAM Retention Voltage, Vr 500 ns Rise and Fall Time (Min) Input Capacitance...
- Page 4 A C E le c tric a l C h a ra c te ris tic s (Continued) S K ____/ \___ f \ i w s ^ j w h T L /D D /1 1 2 0 8 -2 FIGURE 2.
- Page 5 1-54...
- Page 6 I/O bit can be individually configured under software control C O P 8 2 0 C J Pin A s s ig n m e n t as shown below: Port Port L Port L Port L Funct. Config. Data Setup MIWU/CMPOUT Hi-Z Input (TRI-STATE)
- Page 7 Any bit of data memory can be directly set, reset or tested. Pin D e s c rip tio n (Continued) All I/O and registers (except A and PC) are memory Pins G1 and G2 currently do not have any alternate func mapped;...
- Page 8 F u n c tio n a l D e s c rip tio n (Continued) If the external or RC Clock option is being used: RESET as long as Vcc is below the Brown Out Voltage. The Device will resume execution if Vcc rises above the Brown RAM Contents UNCHANGED Out Voltage.
-
Page 9: External Oscillator
Functional Description (Continued) Oscillator Circuits EXTERNAL OSCILLATOR CKI can be driven by an external clock signal provided it meets the specified duty cycle, rise and fall times, and input levels. CKO is available as a general purpose input G7 and/or Halt control. CRYSTAL OSCILLATOR RESTART By selecting CKO as a clock output, CKI and CKO can be... - Page 10 Functional Description (Continued) Current Drain If the two pin crystal/resonator oscillator is being used and Multi-Input Wakeup or Brown Out causes the device to exit The total current drain of the chip depends on: the HALT mode, the WAKEUP signal does not allow the 1.
- Page 11 Functional Description (Continued) MICROWIRE/PLUS TABLE III MICROWIRE/PLUS is a serial synchronous bidirectional SK Cycle Time communications interface. The MICROWIRE/PLUS capabil ity enables the device to interface with any of National Semiconductor’s MICROWIRE peripherals (i.e. A/D con verters, display drivers, EEPROMS, etc.) and with other mi crocontrollers which support the MICROWIRE/PLUS inter...
- Page 12 MODE 1. TIMER WITH AUTO-LOAD REGISTER F u n ctio n al D e s c rip tio n (Continued) In this mode of operation, the timer T1 counts down at the The user must set the BUSY flag immediately upon entering instruction cycle rate.
- Page 13 T im e r /C o u n te r W a tc h d o g (Continued) The device has an on-board 8-bit WATCHDOG timer. The MODE 3. TIMER WITH CAPTURE REGISTER timer contains an 8-bit READ/WRITE down counter clocked Tinner T1 can be used to precisely measure external fre...
- Page 14 F u n c tio n a l D e s c rip tio n (Continued) CONTROL/STATUS BITS WDREN: WD Reset Enable WDUDF: WATCHDOG Timer Underflow Bit WDREN bit resides in a separate register (bit 0 of WDREG). This bit enables the WATCHDOG timer to generate a reset. This bit resides in the CNTRL2 Register.
- Page 15 M o d u la to r/T im e r The Modulator/Timer contains an 8-bit counter and an 8-bit control bit by software loads the counter with the value of autoreload register (MODRL address OCF Hex). The Modu the autoreload register and starts the counter. The counter lator/Timer has two modes of operation, selected by the underflow toggles the (L7) output pin.
- Page 16 M o d u la to r/T im e r (Continued) START/STOP T L /D D /1 1 2 0 8 -1 7 256 ^ (MAX.) T L /D D /1 1 2 0 8 -1 8 FIGURE 14. Mode 2a: 50% Duty Cycle Output INTERNAL DATA BUS -------------- : k MODRL...
- Page 17 the edge select change in WKEDG. Next, the associated C o m p a ra to r WKPND bit should be cleared, followed by the associated The device has one differential comparator. Ports L0-L2 WKEN bit being re-enabled. are used for the comparator. The output of the comparator An example may serve to clarify this procedure.
-
Page 18: Interrupt Processing
M u lti-In p u t W a k e u p (Continued) IPND and TPND bits signal which interrupt is pending. After INTERNAL DATA BUS an interrupt is acknowledged, the user can check these two bits to determine which interrupt is pending. This permits the interrupts to be prioritized under software. - Page 19 C o n tro l R e g is te rs The Half-Carry bit is also effected by all the instructions that CNTRL1 REGISTER (ADDRESS OOEE) effect the Carry flag. The flag values depend upon the in The Timer and MICROWIRE control register contains the struction.
- Page 20 M e m o ry M ap A d d re s s in g M o d e s All RAM, ports and registers (except A and PC) are mapped There are ten addressing modes, six for operand address into data memory address space.
- Page 21 In s tru c tio n S e t REGISTER AND SYMBOL DEFINITIONS Symbols Memory indirectly addressed by B register Reaisters Memory indirectly addressed by X register 8-bit Accumulator register Direct address memory or [B] 8-bit Address register Mem! Direct address memory or [B] or Immediate data 8-bit Address register 8-bit Immediate data 8-bit Stack pointer register...
- Page 22 1-71...
- Page 23 In s tru c tio n E x e c u tio n T im e B Y T E S an d C Y C L E S p e r Most instructions are single byte (with immediate address IN S T R U C T IO N ing mode instruction taking two bytes).
- Page 24 flexible user-interface for maximum productivity. Inter B Y T E S an d C Y C L E S p er changeable probe cards, which connect to the standard IN S T R U C T IO N (Continued) common base, support the various configurations and pack ages of the COP8 family.
-
Page 25: Programming Support
2.3V-6.0V COP820CJ SINGLE CHIP EMULATOR MACRO CROSS ASSEMBLER The COP820CJ family is supported by One-Time Program National Semiconductor offers a COP8 macro cross assem mable (OTP) emulators. For more detailed information refer bler. It runs on industry standard compatible PCs and sup... -
Page 26: Information System
+ 31-921-7844 + 2-9173005 -APRO One-Time Programmable (OTP) Selection Table Device Number Package Emulates COP8720CJN 28 DIP COP820CJ 28 SO COP8720CJWM COP820CJ COP8722CJWM 20 DIP COP822CJ DIAL-A-HELPER If the user has a PC with a communications package then files from the FILE SECTION can be down-loaded to disk for Dial-A-Helper is a service provided by the Microcontroller later use.