Texas Instruments CC1150 Manual

Low power sub-1 ghz rf transmitter

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1 Device Overview

1.1

Features

• Small Size

– QLP 4-mm × 4-mm Package, 16 Pins

• True Single Chip UHF RF Transmitter

• Frequency Bands

– 300 to 348 MHz

– 400 to 464 MHz

– 800 to 928 MHz

• Programmable Data Rate Up to 500 kBaud

• Low Current Consumption

• Programmable Output Power Up to +10 dBm for

All Supported Frequencies

• Programmable Baseband Modulator

• Ideal For Multi-channel Operation

• Very Few External Components

– Completely On-chip Frequency Synthesizer

– No External Filters Needed

• Configurable Packet Handling Hardware

• Suitable for Frequency Hopping Systems Due to a

Fast Settling Frequency Synthesizer

• Optional Forward Error Correction with Interleaving

1.2

Applications

•

Ultra-low Power UHF Wireless Transmitters

•

Operating in the 315-, 433-, 868-, and 915-MHz

ISM/SRD bands

•

AMR – Automatic Meter Reading

•

Consumer Electronics

•

RKE – Remote Keyless Entry

1.3

Description

The CC1150 is a true single-chip UHF transmitter designed for very low power wireless applications. The

circuit is mainly intended for the ISM (Industrial, Scientific and Medical) and SRD (Short Range Device)

frequency bands at 315-, 433-, 868-, and 915-MHz, but can easily be programmed for operation at other

frequencies in the 300 to 348 MHz, 400 to 464 MHz and 800 to 928 MHz bands.

The RF transmitter is integrated with a highly configurable baseband modulator. The modulator supports

various modulation formats and has a configurable data rate up to 500 kBaud. The CC1150 device

provides extensive hardware support for packet handling, data buffering and burst transmissions.

The main operating parameters and the 64-byte transmit FIFO of CC1150 can be controlled via an SPI

interface. In a typical system, the CC1150 device will be used together with a microcontroller and a few

additional passive components.

CC1150 is part of the SmartRF™ technology platform based on 0.18-μm CMOS technology from Texas

Instruments.

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

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CC1150 Low Power Sub-1 GHz RF Transmitter

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SWRS037B – JANUARY 2006 – REVISED MARCH 2015

• 64-byte TX Data FIFO

• Suited for Systems Compliant with EN 300 220

and FCC CFR Part 15

• Many Powerful Digital Features Allow a High-

performance RF system to be made Using an

Inexpensive Microcontroller

• Efficient SPI interface: All Registers Can be

Programmed With One "Burst" Transfer

• Integrated Analog Temperature Sensor

• Lead-free "Green" Package

• Flexible Support for Packet Oriented Systems

– On-chip Support for Sync-Word Insertion,

Flexible Packet Length and Automatic CRC

Handling

• OOK and Flexible ASK Shaping Supported

• 2-FSK, GFSK and MSK Supported

• Optional Automatic Whitening of Data

• Support for Asynchronous Transparent Transmit

Mode for Backwards Compatibility with Existing

Radio Communication Protocols

•

Low Power Telemetry

•

Home and Building Automation

•

Wireless Alarm and Security Systems

•

Industrial Monitoring and Control

•

Wireless Sensor Networks

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Community

CC1150

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Summary of Contents for Texas Instruments CC1150

Page 1: Features
The main operating parameters and the 64-byte transmit FIFO of CC1150 can be controlled via an SPI interface. In a typical system, the CC1150 device will be used together with a microcontroller and a few additional passive components.
Page 2: Device Overview
8, Mechanical Packaging and Orderable Information. Functional Block Diagram RADIO CONTROL SCLK FREQ RF_P SO (GDO1) SYNTH RF_N GDO0 (ATEST) BIAS XOSC RBIAS XOSC_Q1 XOSC_Q2 Device Overview Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 3: Table Of Contents
Mechanical Packaging and Orderable ................Configuration Software Information ........4-wire Serial Configuration and Data Interface Packaging Information ..Microcontroller Interface and Pin Configuration Table of Contents Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 4: Revision History
This data manual revision history highlights the changes made to the SWRS037A device-specific data manual to make it an SWRS037B revision. Changes from January 1, 2006 to February 19, 2015 Page ....................• Updated RST package to RGV. Revision History Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 5: Terminal Configuration And Functions
(1) The exposed die attach pad must be connected to a solid ground plane as this is the main ground connection for the chip. (2) This pin is intended for use with the CC1150 only. It can not be used to provide supply voltage to other devices.
Page 6: Specifications
GFSK, OOK and ASK (Shaped) MSK (also known as Data rate differential offset QPSK) kBaud Optional Manchester encoding (the data rate in kbps will be half the baud rate) Specifications Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 7: Current Consumption
See also DN006 [5]. Delivered to a 50-Ω single-ended load via Output power, highest setting CC1150 EM reference design (see [2]) RF matching network. Maximum output power can be increased 1 to 2 dB by using wire-wound inductors instead of multilayer inductors in the balun and filter circuit for the 868/915 MHz band, see more in DN017 [6].
Page 8: Crystal Oscillator
RF output ports. (1) Note that close-in spurs vary with centre frequency and limits the frequencies and output power level which the CC1150 can operate at without violating regulatory restrictions. See also Section 6.2.5...
Page 9: Analog Temperature Sensor
VDD – 0.3 For up to 4 mA output current Logic "0" input current –1 µA Input equals 0 V Logic "1" input current µA Input equals VDD Specifications Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 10: Power-On Reset
JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages • JESD51-9, Test Boards for Area Array Surface Mount Package Thermal Measurements Power dissipation of 2 W and an ambient temperature of 70ºC is assumed. Specifications Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 11: Detailed Description
5 Detailed Description Overview The CC1150 transmitter is based on direct synthesis of the RF frequency. The frequency synthesizer includes a completely on-chip LC VCO. A crystal is to be connected to XOSC_Q1 and XOSC_Q2. The crystal oscillator generates the reference frequency for the synthesizer, as well as clocks for the digital part.
Page 12: Configuration Software
[11] software. The SmartRF Studio software is highly recommended for obtaining optimum register settings, and for evaluating performance and functionality. A screenshot of the SmartRF Studio user interface for CC1150 is shown in Figure 5-3. After chip reset, all the registers have default values as shown in the tables in Section 5.20.
Page 13: 4-Wire Serial Configuration And Data Interface
Table 5-1. When CSn is pulled low, the MCU must wait until the CC1150 SO pin goes low before starting to transfer the header byte. This indicates that the voltage regulator has stabilized and the crystal is running. Unless the chip is in the SLEEP or XOFF states, the SO pin will always go low immediately after taking CSn low.
Page 14 When the header byte, data byte or command strobe is sent on the SPI interface, the chip status byte is sent by the CC1150 on the SO pin. The status byte contains key status signals, useful for the MCU. The first bit, s7, is the CHIP_RDYn signal;...
Page 15 (for example, MARCSTATE or TXBYTES), there is a small, but finite, probability that a single read from the register is being corrupt. As an example, the probability of any single read from TXBYTES being corrupt, assuming the maximum data rate is used, is approximately 80 ppm. Refer to the CC1150 Errata Notes for more details.
Page 16 IDLE or TX_UNDERFLOW states. The FIFO is cleared when going to the SLEEP state. Figure 5-6 gives a brief overview of different register access types possible. Detailed Description Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 17: Microcontroller Interface And Pin Configuration
The content of the PATABLE is lost when entering the SLEEP state. For more information, see DN501 [8]. Microcontroller Interface and Pin Configuration In a typical system, CC1150 will interface to a microcontroller. This microcontroller must be able to do the following: •...
Page 18: Data Rate Programming
5.6.3 Optional Radio Control Feature The CC1150 has an optional way of controlling the radio by reusing SI, SCLK, and CSn from the SPI interface. This feature allows for a simple three-pin control of the major states of the radio: SLEEP, IDLE, and TX.
Page 19: Packet Handling Hardware Support
Optionally compute and add a 2-byte CRC checksum over the data field. In a system where CC1150 is used as the transmitter and CC1101 as the receiver the recommended setting is 4-byte preamble and 4-byte sync word except for 500 kBaud data rate where the recommended preamble length is 8 bytes.
Page 20 Real world data often contain long sequences of zeros and ones. Performance can then be improved by whitening the data before transmitting, and de-whitening in the receiver. With CC1150, in combination with a CC1101 at the receiver end, this can be done automatically by setting PKTCTRL0WHITE_DATA=1. All...
Page 21 5.8.2.1, this can be used to support packet formats with different length configuration than natively supported by CC1150. One should make sure that TX mode is not turned off during the transmission of the first half of any byte. Refer to the CC1150 Errata Notes for more details.
Page 22 FIFO can be read from the chip status byte returned on the MISO line each time a header byte, data byte, or command strobe is sent on the SPI bus. Detailed Description Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
Page 23: Modulation Formats
FEC/Interleaver option or when using MSK modulation. 5.9.1 Frequency Shift Keying CC1150 has the possibility to use Gaussian shaped 2_FSK (GFSK). The 2-FSK signal is then shaped by a Gaussian filter with BT=1, producing a GFSK modulated signal. This spectrum-shaping feature improves adjacent channel power (ACP) and occupied bandwidth.
Page 24: Forward Error Correction With Interleaving
5.10.1 Forward Error Correction (FEC) CC1150 has built in support for Forward Error Correction (FEC) that can be used with CC1101 at the receiver end. To enable this option, set MDMCFG1.FEC_EN to 1. FEC is only supported in fixed packet length mode, that is, when PKTCTRL0.LENGTH_CONFIG=0.
Page 25 In order to increase the robustness to errors spanning multiple bits, interleaving is used when FEC is enabled. After de-interleaving, a continuous span of errors in the received stream will become single errors spread apart. CC1150 employs matrix interleaving, which is illustrated in Figure 5-10. The on-chip interleaving buffer is a 4 ×...
Page 26: Radio Control
& FS_AUTOCAL = 10 | 11 CALIBRATE TXOFF_MODE = 00 TX_UNDERFLOW & FS_AUTOCAL = 00 | 01 SFTX IDLE Figure 5-11. Radio Control State Diagram Detailed Description Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 27 10.1 for more details on CHIP_RDYn. When the CC1150 reset is completed the chip will be in the IDLE state and the crystal oscillator running. If the chip has had sufficient time for the crystal oscillator and voltage regulator to stabilize after the power- on-reset, the SO pin will go low immediately after taking CSn low.
Page 28 NOTE The above reset procedure is only required just after the power supply is first turned on. If the user wants to reset the CC1150 after this, it is only necessary to issue an SRES command strobe. It is recommended to always send a SRES command strobe on the SPI interface after power-on even though power-on reset is used.
Page 29: Data Fifo
5.12 Data FIFO The CC1150 contains a 64 byte FIFO for data to be transmitted. The SPI interface is used for writing to the TX FIFO. Section 10.5 contains details on the SPI FIFO access. The FIFO controller will detect underflow in the TX FIFO.
Page 30 TX FIFO when the threshold flag toggles, in the case of FIFO_THR=13. Figure 5-15 shows the flag as the FIFO is filled above the threshold, and then drained below. Detailed Description Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 31: Frequency Programming
Figure 5-15. FIFO_THR=13 versus Number of Bytes in FIFO 5.13 Frequency Programming The frequency programming in CC1150 is designed to minimize the programming needed in a channel- oriented system. To set up a system with channel numbers, the desired channel spacing is programmed with the MDMCFG0.CHANSPC_M and MDMCFG1.CHANSPC_E registers.
Page 32: Voltage Regulators
5.15 Voltage Regulators CC1150 contains several on-chip linear voltage regulators, which generate the supply voltage needed by low-voltage modules. These voltage regulators are invisible to the user, and can be viewed as integral parts of the various modules. The user must however make sure that the absolute maximum ratings and required pin voltages in Section 4.1...
Page 33: General Purpose And Test Output Control Pins
FREND0.PA_POWER should be 7 when ASK is active. The shaping of the ASK signal is dependent on the configuration of the PATABLE. Figure 5-17 shows some examples of ASK shaping. NOTE The OOK/ASK pulse shaping feature on the CC1150 is only supported for output power levels below –1 dBm. Output Power PATABLE[7] PATABLE[6]...
Page 34 Serial Clock. Synchronous to the data in synchronous serial mode. 11 (0x0B) In TX mode, data is sampled by CC1150 on the rising edge of the serial clock when GDOx_INV=0. 12 (0x0C) Reserved – defined on the transceiver version (CC1101).
Page 35: Asynchronous And Synchronous Serial Operation
When asynchronous transfer is enabled, several of the support mechanisms for the MCU that are included in CC1150 will be disabled, such as packet handling hardware, buffering in the FIFO and so on. The asynchronous transfer mode does not allow the use of the data whitener, interleaver and FEC, and it is not possible to use Manchester encoding.
Page 36: System Considerations And Guidelines
NRZ encoded (MDMCFG2.MANCHESTER_EN=0). In synchronous serial operation mode, data is transferred on a two wire serial interface. The CC1150 provides a clock that is used to set up new data on the data input line. Data input (TX data) is the GDO0 pin. This pin will automatically be configured as an input when TX is active.
Page 37 It must be noted that the content of the CC1150 is not retained in SLEEP state, and thus it is necessary to write to the TEST0 register, along with other registers, when returning from the SLEEP state and initiating calibrations.
Page 38: Memory
5.19.7 Battery-Operated Systems In low power applications, the SLEEP state should be used when the CC1150 is not active. 5.19.8 Increasing Output Power In some applications it may be necessary to extend the link range. Adding an external power amplifier is the most effective way of doing this.
Page 39 Figure 5-19 summarizes the SPI address space. Registers that are only defined on the CC1101 transceiver are also listed. CC1101 and CC1150 are register compatible, but registers and fields only implemented in the transceiver always contain 0 in CC1150. The address to use is given by adding the base address to the left and the burst and read/write bits on the top.
Page 40 0x39 (0xF9) VCO_VC_DAC Current setting from PLL calibration module Table 5-48 0x3A (0xFA) TXBYTES Underflow and number of bytes in the TX FIFO Table 5-49 Detailed Description Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 41 0x3F TX FIFO TX FIFO RX FIFO RX FIFO Greyed text: not implemented on CC1150 thus only valid for the transceiver version (CC1101) Figure 5-19. SPI Address Space Detailed Description Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
Page 42 8 MSB of 16-bit sync word. Table 5-18. 0x05: SYNC0 – Sync Word, Low Byte FIELD TYPE RESET DESCRIPTION SYNC[7:0] 0x91 8 LSB of 16-bit sync word. Detailed Description Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 43 Table 5-22. 0x0A: CHANNR – Channel Number FIELD TYPE RESET DESCRIPTION CHAN[7:0] The 8-bit unsigned channel number, which is multiplied by the channel spacing setting and added to the base frequency. Detailed Description Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 44 (256 CHANSPC _ M) 2 ´ ´ CHAN channel The default values give a data rate of 115.051 kBaud (closest setting to 115.2 kBaud), assuming a 26.0 MHz crystal. Detailed Description Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 45 010 = 4 011 = 6 100 = 8 101 = 12 110 = 16 111 = 24 Not Used. CHANSPC_E[1:0] 2 bit exponent of channel spacing. Detailed Description Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 46 00 = IDLE 01 = FSTXON 10 = Stay in TX (start sending preamble) 11 = Do not use, not implemented on CC1150 Detailed Description Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback...
Page 47 ‘0’ to the PA_POWER value are used for ASK TX shaping, and for power ramp- up/ramp-down at the start/end of transmission in all TX modulation formats. Detailed Description Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 48 Table 5-39. 0x29: FSTEST – Frequency Synthesizer Calibration Control FIELD TYPE RESET DESCRIPTION FSTEST[7:0] 0x57 For test only. Do not write to this register. Detailed Description Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 49 Chip part number. Table 5-45. 0x31 (0xF1): VERSION – Chip ID FIELD TYPE RESET DESCRIPTION VERSION[7:0] 0x04 Chip version number. Subject to change without notice Detailed Description Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 50 Status registers for test only. Table 5-49. 0x3A (0xFA): TXBYTES – Underflow and Number of Bytes FIELD TYPE RESET DESCRIPTION TXFIFO_UNDERFLOW NUM_TXBYTES Number of bytes in TX FIFO. Detailed Description Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 51: Applications, Implementation, And Layout
6.1.1 Typical Application A simplified block diagram of CC1150 is shown in Figure 5-1. Only a few external components are required for using the CC1150. The recommended application circuits are shown in Figure 6-1 Figure 6-2. The external components are described in...
Page 52 Part of optional RF LC filter (868/915 MHz)(inexpensive multi-layer type) R141 Resistor for internal bias current reference XTAL 26 to 27 MHz crystal Applications, Implementation, and Layout Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 53: Design Requirements
L112 for the 868/915 MHz reference design)] form a balun that converts the differential RF signal on CC1150 to a single-ended RF signal. C104 is needed for dc blocking. Together with an appropriate LC filter network, the balun components also transform the impedance to match a 50-Ω antenna (or cable).
Page 54 Table 6-3. Crystal Oscillator Component Values COMPONENT = 10 pF = 13 pF = 16 pF 15 pF 22 pF 27 pF 15 pF 22 pF 27 pF Applications, Implementation, and Layout Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 55: Pcb Layout Recommendations
Each decoupling capacitor should be connected to the power line (or power plane) by separate vias. The best routing is from the power line (or power plane) to the decoupling capacitor and then to the CC1150 supply pin. Supply power filtering is very important. Applications, Implementation, and Layout Copyright ©...
Page 56 Gerber files and schematics for the reference designs are available for download from the TI website. Circles are Vias Figure 6-4. Left: Top Solder Resist Mask (Negative) and Right: Top Paste Mask Applications, Implementation, and Layout Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 57 There are five 10-mil diameter via holes distributed symmetrically in the ground pad under the package. See also the CC1150EM reference design ( [2]). Applications, Implementation, and Layout Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150...
Page 58: Device And Documentation Support
To designate the stages in the product development cycle, TI assigns prefixes to the part numbers. Each device has one of three prefixes: X, P, or null (no prefix) (for example, CC1150 is in production; therefore, no prefix is assigned).
Page 59: Glossary
SmartRF, E2E are trademarks of Texas Instruments. Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
Page 60 Samples Drawing (4/5) CC1150RGVR ACTIVE VQFN 2500 Green (RoHS CU NIPDAU | Level-3-260C-168 HR -40 to 85 CC1150 & no Sb/Br) CU NIPDAUAG CC1150RGVT ACTIVE VQFN Green (RoHS CU NIPDAU | Level-3-260C-168 HR -40 to 85 CC1150 & no Sb/Br)
Page 61 PACKAGE OPTION ADDENDUM www.ti.com 30-May-2018 Addendum-Page 2...
Page 62 PACKAGE MATERIALS INFORMATION www.ti.com 21-Nov-2016 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Reel Reel Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1 (mm) CC1150RGVR VQFN 2500 330.0 12.4 12.0 CC1150RGVT VQFN 180.0 12.4...
Page 63 PACKAGE MATERIALS INFORMATION www.ti.com 21-Nov-2016 *All dimensions are nominal Device Package Type Package Drawing Pins Length (mm) Width (mm) Height (mm) CC1150RGVR VQFN 2500 336.6 336.6 28.6 CC1150RGVT VQFN 210.0 185.0 35.0 Pack Materials-Page 2...
Page 66 IMPORTANT NOTICE Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.

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