Texas Instruments CC1070 Manual

Texas Instruments CC1070 Manual

Single chip low power rf transmitter for narrowband systems

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CC1070
Single Chip Low Power RF Transmitter for Narrowband Systems
Applications
• Narrowband low power UHF wireless
data transmitters
• 402 / 424 / 426 / 429 / 433 / 447 / 449 /
469 /
868 and 915 MHz ISM/SRD
band systems
• TPMS – Tire Pressure Monitoring
Systems
Product Description
CC1070
is
a
true
transmitter designed for very low power
and very low voltage wireless applications.
The circuit is mainly intended for the ISM
(Industrial, Scientific and Medical) and
SRD (Short Range Device) frequency
bands at 402, 424, 426, 429, 433, 447,
449, 469, 868 and 915 MHz, but can
easily be programmed for multi-channel
operation at other frequencies in the 402 -
470 and 804 - 940 MHz range.
CC1070
The
is especially suited for narrow-
band systems with channel spacings of
12.5 or 25 kHz complying with ARIB STD
T-67 and EN 300 220.
CC1070
The
main operating parameters
can be programmed via a serial bus, thus
CC1070
making
a very flexible and easy to
use transmitter.
In a typical application
Features
• True single chip UHF RF transmitter
• Frequency range 402 - 470 MHz and
804 - 940 MHz
• Programmable output power
• Low supply voltage (2.3 to 3.6 V)
• Very few external components required
• Small size (QFN 20 package)
• Pb-free package
• Data rate up to 153.6 kBaud
• OOK, FSK and GFSK data modulation
• Fully on-chip VCO
single-chip
UHF
SWRS043A
• AMR – Automatic Meter Reading
• Wireless alarm and security systems
• Home automation
• Low power telemetry
CC1070
will be used together with a
microcontroller and a few external passive
components.
• Programmable
frequency
crystal temperature drift compensation
possible without TCXO
• Suitable for frequency hopping systems
• Suited
for
systems
compliance with EN 300 220, FCC
CFR47 part 15 and ARIB STD T-67
• Development kit available
• Easy-to-use software for generating the
CC1070
configuration data
CC1070
makes
targeting
Page 1 of 54

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Summary of Contents for Texas Instruments CC1070

  • Page 1 CC1070 CC1070 Single Chip Low Power RF Transmitter for Narrowband Systems Applications • Narrowband low power UHF wireless • AMR – Automatic Meter Reading data transmitters • Wireless alarm and security systems • 402 / 424 / 426 / 429 / 433 / 447 / 449 / •...
  • Page 2: Table Of Contents

    CC1070 Table of Contents Abbreviations........................ 4 Absolute Maximum Ratings ..................5 Operating Conditions ....................5 Electrical Specifications ....................5 RF Transmit Section .................... 6 Crystal Oscillator Section..................8 Frequency Synthesizer Section ................9 Digital Inputs / Outputs ..................10 Current Consumption..................11 Pin Assignment......................
  • Page 3 PA_EN Pin Drive .................... 37 System Considerations and Guidelines..............37 PCB Layout Recommendations ................39 Antenna Considerations .................... 39 Configuration Registers..................... 40 24.1 CC1070 Register Overview................41 Package Marking ......................52 25.1 Soldering Information ..................52 25.2 Tray Specification................... 52 25.3...
  • Page 4: Abbreviations

    CC1070 Abbreviations Adjacent Channel Power Automatic Meter Reading Amplitude Shift Keying Bill Of Materials bits per second Bandwidth-Time product (for GFSK) Continuous Wave Do Not Mount Equivalent Series Resistance FHSS Frequency Hopping Spread Spectrum Frequency Modulation Frequency Synthesizer Frequency Shift Keying...
  • Page 5: Absolute Maximum Ratings

    CC1070 Absolute Maximum Ratings The absolute maximum ratings given Table 1 should under no circumstances be violated. Stress exceeding one or more of the limiting values may cause permanent damage to the device. Parameter Unit Condition Supply voltage, VDD -0.3...
  • Page 6: Rf Transmit Section

    CC1070 4.1 RF Transmit Section Parameter Min. Typ. Max. Unit Condition / Note Transmit data rate 0.45 153.6 kBaud The data rate is programmable. See section 10 on page 22 for details. NRZ or Manchester encoding can be used. 153.6 kBaud equals 153.6 kbps using NRZ coding...
  • Page 7 CC1070 Parameter Min. Typ. Max. Unit Condition / Note Modulation bandwidth, 868 MHz Bandwidth where the power 19.2 kBaud, ±9.9 kHz frequency envelope of modulation equals deviation –36 dBm. Spectrum analyzer RBW = 1 kHz. 38.4 kBaud, ±19.8 kHz frequency...
  • Page 8: Crystal Oscillator Section

    CC1070 4.2 Crystal Oscillator Section Parameter Min. Typ. Max. Unit Condition / Note Crystal Oscillator Frequency 4.9152 14.7456 19.6608 Crystal operation Parallel C4 and C5 are loading capacitors. See section 17 on page 34 for details. Crystal load capacitance 4-6 MHz, 22 pF recommended...
  • Page 9: Frequency Synthesizer Section

    CC1070 4.3 Frequency Synthesizer Section Parameter Min. Typ. Max. Unit Condition / Note Phase noise, 402 – 470 MHz Unmodulated carrier 12.5 kHz channel spacing −87 dBc/Hz At 12.5 kHz offset from carrier −95 dBc/Hz At 25 kHz offset from carrier −100...
  • Page 10: Digital Inputs / Outputs

    CC1070 4.4 Digital Inputs / Outputs Parameter Unit Condition / Note Logic "0" input voltage 0.3* Logic "1" input voltage 0.7* Logic "0" output voltage Output current −2.0 mA, 3.0 V supply voltage Logic "1" output voltage Output current 2.0 mA, 3.0 V supply voltage...
  • Page 11: Current Consumption

    CC1070 4.5 Current Consumption Parameter Min. Typ. Max. Unit Condition / Note µA Power Down mode Oscillator core off Current consumption, 433/868 MHz: P = −20 dBm 12.3/13.9 The output power is delivered to a 50 Ω single-ended load. P = −5 dBm 14.7/16.8...
  • Page 12: Pin Assignment

    CC1070 Pin Assignment CC1070 Table 8 provides an overview of the comes in a QFN20 type CC1070 pinout. package. PCLK 1 AVDD DI 2 PA_EN PDI 3 AVDD PDO 4 RF_OUT DVDD 5 R_BIAS AGND Exposed die attached pad CC1070 Figure 1.
  • Page 13: Circuit Description

    CC1070 Circuit Description FREQ DIGITAL LOCK SYNTH INTERFACE TO µC DCLK Power Control DIGITAL Multiplexer MODULATOR PCLK PSEL - Modulation RF_OUT - Data shaping BIAS XOSC - Power Control R_BIAS XOSC_Q1 XOSC_Q2 CHP_OUT CC1070 Figure 2. simplified block diagram CC1070...
  • Page 14 CC1070 achieve the optimum performance for reference design that should be followed narrowband applications. TI provides a very closely. DVDD=3V AVDD=3V AVDD=3V AVDD=3V PCLK AVDD PA_EN Monopole antenna (50 Ohm) AVDD RF_OUT LC filter DVDD=3V DVDD R_BIAS XTAL AVDD=3V Figure 3. Typical application and test circuit (power supply decoupling not shown)
  • Page 15 CC1070 Item 433 MHz 868 MHz 915 MHz 2.2 pF, 5%, NP0, 0402 1.5 pF, 5%, NP0, 0402 1.5 pF, 5%, NP0, 0402 5.6 pF, 5%, NP0, 0402 10 pF, 5%, NP0, 0402 10 pF, 5%, NP0, 0402 22 pF, 5%, NP0, 0402...
  • Page 16: Configuration Overview

    CC1070 Configuration Overview CC1070 frequency separation, crystal oscillator can be configured to achieve reference frequency optimum performance different • Power-down / power-up mode applications. Through the programmable • Crystal oscillator power-up / power configuration registers the following key parameters can be programmed: down •...
  • Page 17: Microcontroller Interface

    CC1070 Microcontroller Interface CC1070 purposes when the configuration interface Used in a typical system, will is not used. PDI, PDO and PCLK are high interface microcontroller. This impedance inputs as long as PSEL is not microcontroller must be able to: activated (active low).
  • Page 18: 4-Wire Serial Configuration Interface

    CC1070 9.1 4-wire Serial Configuration Interface CC1070 done on the positive edge of PCLK. Data is configured via a simple 4-wire should be set up on the negative edge of SPI-compatible interface (PDI, PDO, CC1070 PCLK by the microcontroller. When the...
  • Page 19 CC1070 CL,min CH,min PCLK Address Write mode Data byte PSEL Figure 6. Configuration registers write operation CL,min CH,min PCLK Address Read mode Data byte PSEL Figure 7. Configuration registers read operation SWRS043A Page 19 of 54...
  • Page 20: Signal Interface

    CC1070 Parameter Symbol Unit Conditions PCLK, clock PCLK frequency PCLK low The minimum time PCLK must be low. CL,min pulse duration PCLK high The minimum time PCLK must be high. CH,min pulse duration PSEL setup The minimum time PSEL must be low before time positive edge of PCLK.
  • Page 21 “1” is encoded as a high-to- low transition. See Figure 11. Clock provided by DCLK CC1070 Data provided by microcontroller FSK modulating signal "RF" internal in CC1070 Figure 8. Synchronous NRZ mode Clock provided by DCLK CC1070 Data provided by microcontroller FSK modulating signal "RF"...
  • Page 22: Data Rate Programming

    CC1070 Time Figure 11. Manchester encoding 10 Data Rate Programming The data rate (baud rate) is programmable and depends on the crystal frequency and MCLK_DIV1[2:0] DIV1 programming CLOCK (CLOCK_A and CLOCK_B) registers. The baud rate (B.R) is given by 12.5 xosc ⋅...
  • Page 23: Frequency Programming

    CC1070 Data rate Crystal frequency [MHz] [kBaud] 4.9152 7.3728 9.8304 12.288 14.7456 17.2032 19.6608 0.45 4.096 8.192 14.4 16.384 19.2 28.8 32.768 38.4 57.6 65.536 76.8 115.2 153.6 Table 14. Some possible data rates versus crystal frequency 11 Frequency Programming Programming the frequency word in the in the frequency band 402 –...
  • Page 24: Dithering

    CC1070 FSK frequency deviation is programmed in − f the DEVIATION register. The deviation programming is divided into a mantissa (TXDEV_M[3:0]) exponent (TXDEV_X[2:0]). where f is set by the DEVIATION register: Generally REF_DIV should be as low as possible but the following requirements −...
  • Page 25: Output Power Programming

    CC1070 12.3 Output Power Programming The RF output power from the device is use either the lower or upper 4-bits in the programmable by the 8-bit PA_POWER register to control the power, as shown in register. Figure 12 and Figure 13 shows the figures.
  • Page 26: Tx Data Latency

    CC1070 12.4 TX Data Latency The transmitter will add a delay due to the equivalent to at least 2 bits after the data synchronization of the data with DCLK and payload has been transmitted before further clocking into the modulator. The switching off the PA (i.e.
  • Page 27 CC1070 AVDD=3V AVDD=3V ANTENNA ANTENNA RF_OUT RF_OUT CC1070 CC1070 Figure 14. Output matching network 433 MHz Figure 15. Typical optimum PA load impedance, 433 MHz. The frequency is swept from 300 MHz to 2500 MHz. Values are listed in Table 16...
  • Page 28 CC1070 868 MHz 915 MHz Figure 16. Typical optimum PA load impedance, 868/915 MHz. The frequency is swept from 300 MHz to 2800 MHz. Values are listed in Table 17 Frequency (MHz) Real (Ohms) Imaginary (Ohms) 1736 -232 1830 -130 2604 -4.7...
  • Page 29: Frequency Synthesizer

    CC1070 14 Frequency Synthesizer 14.1 VCO, Charge Pump and PLL Loop Filter The VCO is completely integrated and 1) If the data rate is 4.8 kBaud or below operates in the 1608 – 1880 MHz range. A and the RF operating frequency is in the frequency divider is used to get a 402 –...
  • Page 30: Vco And Pll Self-Calibration

    CC1070 14.2 VCO and PLL Self-Calibration • compensate supply voltage, The two frequencies A and B differ by temperature and process variations, the less than 1 MHz VCO and PLL must be calibrated. The • Reference frequencies equal calibration is performed automatically and...
  • Page 31: Pll Turn-On Time Versus Loop Filter Bandwidth

    CC1070 Start calibration Start calibration Start calibration is the reference frequency (in is the reference frequency (in Write FREQ_A, FREQ_B, VCO, Write FREQ_A, FREQ_B, VCO, MHz) MHz) CLOCK_A and CLOCK_B registers. CLOCK_A and CLOCK_B registers. PLL_BW = 146 + 16log PLL_BW = 146 + 16log /7.126)
  • Page 32: Pll Lock Time Versus Loop Filter Bandwidth

    CC1070 PLL turn-on time Comment [nF] [pF] [pF] [kΩ] [kΩ] [us] 8200 2200 3200 Up to 4.8 kBaud data rate, 12.5 kHz channel spacing 3900 1000 2500 Up to 4.8 kBaud data rate, 25 kHz channel spacing 2200 1400 Up to 9.6 kBaud data rate, 50 kHz channel spacing 1300 Up to 19.2 kBaud data rate, 100 kHz channel...
  • Page 33: Power Management

    Turn on power There are separate bits to control the TX part, the frequency synthesizer and the crystal oscillator in the MAIN register. This Reset CC1070 Reset CC1070 individual control can be used to optimize MAIN: MAIN: FREG = 0...
  • Page 34: Crystal Oscillator

    CC1070 Power Down mode Power Down mode Power Down mode Turn on crystal oscillator core Turn on crystal oscillator core MAIN: PD_MODE=1, FS_PD=1, MAIN: PD_MODE=1, FS_PD=1, XOSC_PD=0, BIAS_PD=1 XOSC_PD=0, BIAS_PD=1 PA_POWER: 00h PA_POWER: 00h Wait 1.2 ms* Wait 1.2 ms*...
  • Page 35 CC1070 An external clock signal or the internal The parasitic capacitance is constituted by crystal oscillator can be used as main pin input capacitance and PCB stray frequency reference. An external clock capacitance. Total parasitic capacitance is signal should be connected to XOSC_Q1, typically 8 pF.
  • Page 36: Built-In Test Pattern Generator

    CC1070 18 Built-in Test Pattern Generator CC1070 The PN9 pseudo random sequence is has a built-in test pattern defined by the polynomial x + 1. generator that generates a PN9 pseudo random sequence. The PN9_ENABLE bit The PN9 generator can be used for...
  • Page 37: Pa_En Pin Drive

    CC1070 20.3 PA_EN Pin Drive Figure 21 shows the PA_EN pin drive have opposite signs but absolute values currents. The sink and source currents are used in Figure 21. 1400 1200 1000 Voltage on PA_EN pin [V] source current, 3 V sink current, 3V source current, 2.3 V...
  • Page 38 CC1070 to Application Note AN027 Temperature is used. The switching between the two Compensation available from the TI web frequencies is performed through use of site. the MAIN register. For more details refer to Application Note AN014 Frequency In less demanding applications, a crystal...
  • Page 39: Pcb Layout Recommendations

    CC1070 switching the PA back on after a hop has Note that override bits been performed. VCO_OVERRIDE, CHP_OVERRIDE and VCO_CAL_OVERRIDE must be disabled when performing a re-calibration. 22 PCB Layout Recommendations A two layer PCB with all components decoupling capacitor and then to the CC1070 placed on the top layer can be used.
  • Page 40: Configuration Registers

    CC1070 For low power applications the λ/4- The antenna should be connected as close as possible to the IC. If the antenna monopole antenna is recommended due is located away from the input pin the to its simplicity as well as providing the antenna should be matched to the feeding best range.
  • Page 41: Cc1070 Register Overview

    CC1070 24.1 CC1070 Register Overview ADDRESS Byte Name Description MAIN Main control register INTERFACE Interface control register RESET Digital module reset register Not used FREQ_2A Frequency register 2A FREQ_1A Frequency register 1A FREQ_0A Frequency register 0A CLOCK_A Clock generation register A...
  • Page 42 CAL_LOCK_RESET_N Reset calibration logic and lock detector Note: For reset of CC1070 write RESET_N=0 in the MAIN register. The RESET register should not be used during normal operation Bits in the RESET register are self-clearing (will be set to 1 when the reset operation starts). Relevant digital clocks must be running for the resetting to complete.
  • Page 43 CC1070 FREQ_2A Register (04h) REGISTER NAME Default Active Description value FREQ_2A[7:0] FREQ_A[22:15] 8 MSB of frequency control word A FREQ_1A Register (05h) REGISTER NAME Default Active Description value FREQ_1A[7:0] FREQ_A[14:7] Bit 15 to 8 of frequency control word A FREQ_0A Register (06h)
  • Page 44 CC1070 CLOCK_B Register (0Bh) REGISTER NAME Default Active Description value CLOCK_B[7:5] REF_DIV_B[2:0] Reference frequency divisor (B): 0: Not supported 1: REF_CLK frequency = Crystal frequency / 2 … 7: REF_CLK frequency = Crystal frequency / 8 CLOCK_B[4:2] MCLK_DIV1_B[2:0] Modem clock divider 1 (B): 0: Divide by 2.5...
  • Page 45 CC1070 MODEM Register (0Dh) REGISTER NAME Default Active Description value MODEM[7] Reserved, write 0 (spare register) MODEM[6:4] Reserved MODEM[3] Reserved, write 0 (spare register) MODEM[2] PN9_ENABLE Enable scrambling with PN9 pseudo-random bit sequence 0: PN9 scrambling is disabled 1: PN9 scrambling is enabled (x...
  • Page 46 CC1070 LOCK Register (15h) REGISTER NAME Default Active Description value LOCK[7:4] LOCK_SELECT[3:0] Selection of signals to LOCK pin 0: Set to 0 1: Set to 1 2: LOCK_CONTINUOUS (active low) 3: LOCK_INSTANT (active low) 4: Set to 0 5: CAL_COMPLETE (active low)
  • Page 47 CC1070 ANALOG Register (17h) REGISTER NAME Default Active Description value ANALOG[7] BANDSELECT Frequency band selection 0: 402-470 MHz band 1: 804-940 MHz band ANALOG[6] reserved ANALOG[5] reserved ANALOG[4] PD_LONG Selects short or long reset delay in phase detector 0: Short reset delay 1: Long reset delay Recommended setting: PD_LONG=0.
  • Page 48 CC1070 PLL_BW Register (1Ah) REGISTER NAME Default Active Description value PLL_BW[7:0] PLL_BW[7:0] Charge pump current scaling/rounding factor. Used to calibrate charge pump current for the desired PLL loop bandwidth. The value is given by: PLL_BW = 146 + 16 log /7.126) where f...
  • Page 49 CC1070 PA_POWER Register (1Ch) REGISTER NAME Default Active Description value PA_POWER[7:4] PA_HIGH [3:0] Controls output power in high-power array 0: High-power array is off 1: Minimum high-power array output power … 15: Maximum high-power array output power PA_POWER[3:0] PA_LOW[3:0] Controls output power in low-power array...
  • Page 50 CC1070 TEST4 Register (24h, for test only) REGISTER NAME Default Active Description value TEST4[7] CHP_DISABLE Disable normal charge pump operation TEST4[6] CHP_TEST_UP Force charge pump to output “up” current TEST4[5] CHP_TEST_DN Force charge pump to output “down” current TEST4[4:3] reserved...
  • Page 51 STATUS2 Register (46h, for test only) REGISTER NAME Default Active Description value STATUS2[7:5] CC1070_VERSION[2:0] CC1070 version code: 0: Pre-production version 1: First production version 2-7: Reserved for future use STATUS2[4:0] VCO_ARRAY[4:0] Status vector defining applied VCO_ARRAY value STATUS3 Register (47h, for test only)
  • Page 52: Package Marking

    CC1070 25 Package Marking When contacting technical support with a chip-related question, please state the entire marking information as stated below (this is for RGW package). CC1070 TI YMS LLLL G4 o – pin one symbolization TI – TI letters YM –...
  • Page 53: Ordering Information

    CC1070 26 Ordering Information Orderable Status Package Package Pins Package Eco Plan Lead MSL Peak Device Type Drawing Finish Temp CC1070RSQ NRND Green (RoHS & Matte Tin LEVEL3-260C no Sb/Br) 1 YEAR CC1070RSQR NRND 5000 Green (RoHS & Matte Tin...
  • Page 54: General Information

    CC1070 27 General Information Document Revision History Revision Date Description/Changes 2003-10-30 Initial release. 2005-02-09 The various sections have been reorganized to improve readability Added chapter numbering Reorganized electrical specification section Electrical specifications updated Changed “channel width” to “channel spacing” Changes to current consumption figures in TX mode and crystal...
  • Page 55 PACKAGE MATERIALS INFORMATION www.ti.com 3-Sep-2021 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Reel Reel Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1 (mm) CC1070RGWR VQFN 3000 330.0 12.4 12.0 Pack Materials-Page 1...
  • Page 56 PACKAGE MATERIALS INFORMATION www.ti.com 3-Sep-2021 *All dimensions are nominal Device Package Type Package Drawing Pins Length (mm) Width (mm) Height (mm) CC1070RGWR VQFN 3000 350.0 350.0 43.0 Pack Materials-Page 2...
  • Page 57 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products.IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2021, Texas Instruments Incorporated...

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