AEA PK-232 Technical Reference Manual page 17

Data controller
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PK-232 TECHNICAL MANUAL
Port A interfaces with the modem. The RXDA and CTSA inputs are tied together so that
the incoming data can be read either by the 8530's internal logic (for Packet mode) or by
the firmware directly on a bit-by-bit basis (for AMTOR, Baudot, ASCII and Morse modes).
Similarly, the TXDA output is tied to the 8536 PA6 output so that the outgoing data can be
controlled either by the 8530 or the firmware.
In HDLC operation for Packet mode reception, an internal phase-locked loop is driven by a
clock that is 32 times the Packet baud rate.
The transmitter is driven by a clock right as the Packet baud rate. The divide-by-32 func-
tion is performed by the 74LS393 at U8.
The U7 TRXCA output (pin 14) is the 32× clock, which may be used with an external mo-
dem. This signal is connected to an input on U8, goes through 5 stages of divide-by-2 and
is brought out out to the U7 RTXCA input (pin 12) as the 1× clock.
The RTSA output (pin 17) is the PTT signal, active low. For the PTT to remain active for
any length of time, the DTRA output (pin 16) must furnish a constantly oscillating signal.
This signal goes to the watchdog timer circuit.
Should the oscillating signal stop, the PTT will go inactive after a period determined by
the time constant of R146 (10 k) and C55 (47 µ).
For this scheme to work properly, the DTRA output is toggled every pass trough the main
loop of the PK-232 firmware.
In order to make the 8530 and 8536 chips operate with the Z80A CPU, a state machine
consisting of U9 (74LS164), U14 (74LS11) and U1 (74LS04) is used.
This circuit provides a Wait signal to the CPU and I/O Request and Interrupt Acknowledge
signals to the 8530 and 8536 at proper times, whenever the CPU begins an Interrupt Ac-
knowledge cycle.
For more details, refer to the Z8036/Z8530 SCC Serial Communications Controller Techni-
cal Manual and the Z8036 Z-CIO/Z8536 CIO Counter/Timer and Parallel I/O Unit technical
Manual, both available from Zilog, Inc.
PK232TM Rev. A 5/87
CHAPTER 3 – THEORY OF OPERATION
3-7
Page 17

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