M29W040B; Description; Features - Hitachi 32LD8700C Service Manual

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11.17. M29W040B

11.17.1.

Description

The M29W040B is a 4 Mbit (512Kb x8) non-volatile memory that can be read, erased and
reprogrammed. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. On
power-up the memory defaults to its Read mode where it can be read in the same way as a ROM or
EPROM. The M29W040B is fully backward compatible with the M29W040.The memory is divided into
blocks that can be erased independently so it is possible to preserve valid data while old data is erased.
Each block can be protected independently to prevent accidental Program or Erase commands from
modifying the memory. Program and Erase commands are writ-ten to the Command Interface of the
memory. An on-chip Program/Erase Controller simplifies the process of programming or erasing the
memory by taking care of all of the special operations that are required to update the memory contents.
The end of a program or erase operation can be detected and any error conditions identified. The
command set required to control the memory is consistent with JEDEC standards. Chip Enable, Output
Enable and Write Enable signals control the bus operation of the memory. They allow simple
connection to most microprocessors, often without additional logic.
11.17.2.

Features

• SINGLE 2.7 to 3.6V SUPPLY VOLTAGE for PROGRAM, ERASE and READ OPERATIONS
• ACCESS TIME: 55ns
• PROGRAMMING TIME
- 10μs per Byte typical8
• UNIFORM 64 Kbytes MEMORY BLOCKS
• PROGRAM/ERASE CONTROLLER
- Embedded Byte Program algorithm
- Embedded Multi-Block/Chip Erase algorithm
- Status Register Polling and Toggle Bits
• ERASE SUSPEND and RESUME MODES
- Read and Program another Block during Erase Suspend
• UNLOCK BYPASS PROGRAM COMMAND
- Faster Production/Batch Programming
• LOW POWER CONSUMPTION
- Standby and Automatic Standby
• 100,000 PROGRAM/ERASE CYCLES per BLOCK
• 20 YEARS DATA RETENTION
- Defectivity below 1 ppm/year
• ELECTRONIC SIGNATURE
- Manufacturer Code: 20h
- Device Code: E3h
TFT TV Service Manual
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22
NC
28
21
DACM_L
27
20
DACM_R
26
19
VREF2
25
18
DACA_L
24
17
DACA_R
23
-
NC
22
-
NC
21
16
RESETQ
20
15
NC
19
14
NC
18
13
NC
17
12
I2S_DA_IN2
16
11
DVSS
15
-
DVSS
14
-
DVSS
13
10
DVSUP
12
-
DVSUP
11
-
DVSUP
10
9
ADR_CL
LV
OUT
LV
OUT
LV
OBL
OUT
LV
OUT
LV
LV
LV
IN
OBL
LV
LV
LV
IN
LV
OBL
OBL
OBL
OBL
OBL
OBL
OUT
LV
20
Not connected
Loudspeaker out, left
Loudspeaker out, right
Reference ground 2
Headphone out, left
Headphone out, right
Not connected
Not connected
Power-on-reset
Not connected
Not connected
Not connected
2
I
S2-data input
Digital ground
Digital ground
Digital ground
Digital power supply 5V
Digital power supply 5V
Digital power supply 5V
ADR clock

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