Sony STR-DB900 Service Manual page 37

• IC Pin Function Description
DIGITAL BOARD IC206 CXD9718Q (AUDIO DSP)
Pin No. Pin Name
1 VSS
2 XRST
3 EXTIN
4 LRCKI3
5 VDDI
6 BCKI3
7 PLOCK
8 VSS
9 MCLK1
10 VDDI
11 VSS
12 MCLK2
13 MS
14 SCKOUT
15 LRCKI1
16 VDDE
17 BCKI1
18 SDI1
19 LRCKO
20 BCKO
21 VSS
22 KFSIO
23 to 26 SDO1 to SDO4
27 SPDIF
28 LRCKI2
29 BCKI2
30 SDI2
31 VSS
32 HACN
33 HDIN
34 HCLK
35 HDOUT
36 HCS
37 GP12
38 GP13
39 GP14
40 VDDI
41 VSS
42 GP15
43 OE0
44 CS0
45 WE0
46 VDDE
47 WMD1
48 VSS
49 WMD0
I/O
— Ground
I System reset signal input
I Not used. (Connected to ground.)
I Not used. (Connected to ground.)
— Power supply (+2.5 V)
I Not used. (Connected to ground.)
O Not used. (Open)
— Ground
I System clock input (13.5 MHz)
— Power supply (+2.5 V)
— Ground
O System clock output (13.5 MHz)
Master/slave setting pin ("L": internal clock, "H": external clock)
I
Connected to ground.
O Internal system clock output
I L/R sampling clock signal input from LC89056W
— Power supply (+3.3 V)
I Bit clock signal input from LC89056W
I Audio serial data input
O L/R sampling clock signal output to digital amp
O Bit clock signal output to digital amp
— Ground
I Audio clock signal input from LC89056W
O Audio serial data output to digital amp
O Not used. (Open)
I L/R sampling clock signal input from LC89056W
I Bit clock signal input from LC89056W
I Audio serial data input from analog audio and digital audio
— Ground
O Acknowledge signal output to MB91354APMT
I Serial data input from MB91354APMT
I Serial data transfer clock input from MB91354APMT
O Serial data output to MB91354APMT
I Chip select input from MB91354APMT
I GP data signal input from MB91354APMT
— Not used. (Open)
— Not used. (Open)
— Power supply (+2.5 V)
— Ground
I/O Not used. (Open)
O Not used. (Open)
O Chip select signal output to DRAM
O Write enable signal output to DRAM
— Power supply (+3.3 V)
I Not used. (Connected to VDD.)
— Ground
I Not used. (Connected to VDD.)
Description
STR-DB900
37