Pin Description - Marantz NR1509 Service Manual

ADSP21487KSWZ-2B (DIGITAL : U1021)
176
1
PIN 1
44
45
Pin Name Pin No. Pin Name
SDDQM 1 V
_
DD EXT
MS0 2 DPI_P08
SDCKE 3 DPI_P07
V 4 V
DD _ INT DD _ INT
CLK_CFG1 5 DPI_P09
ADDR0 6 DPI_P10
BOOT_CFG0 7 DPI_P11
V 8 DPI_P12
_
DD EXT
ADDR1 9 DPI_P13
ADDR2 10 DPI_P14
ADDR3 11 DAI_P03
ADDR4 12 NC
ADDR5 13 V
_
DD EXT
BOOT_CFG1 14 NC
GND 15 NC
ADDR6 16 NC
ADDR7 17 NC
NC 18 V
DD _ INT
NC 19 NC
ADDR8 20 NC
ADDR9 21 V
_
DD INT
CLK_CFG0 22 NC
V 23 NC
_
DD INT
CLKIN 24 V
_
DD INT
XTAL 25 NC
ADDR10 26 WDTRSTO
SDA10 27 NC
V 28 V
DD _ EXT DD _ EXT
V 29 DAI_P07
DD _ INT
ADDR11 30 DAI_P13
ADDR12 31 DAI_P19
ADDR17 32 DAI_P01
ADDR13 33 DAI_P02
V 34 V
_ _
DD INT DD INT
ADDR18 35 NC
RESETOUT/RUNRSTIN 36 NC
V 37 NC
DD _ INT
DPI_P01 38 NC
DPI_P02 39 NC
DPI_P03 40 V
DD _ EXT
V 41 V
_ _
DD INT DD INT
DPI_P05 42 DAI_P06
DPI_P04 43 DAI_P05
DPI_P06 44 DAI_P09
133
132
GND PAD
(PIN 177)
at BOTTOM
TOP VIEW
(PINS DOWN)
89
88
Pin No. Pin Name Pin No. Pin Name Pin No.
45 DAI_P10 89 V 133
_
DD INT
46 V 90 FLAG0 134
_
DD INT
47 V 91 FLAG1 135
DD _ EXT
48 DAI_P20 92 FLAG2 136
49 V 93 NC 137
DD _ INT
50 DAI_P08 94 FLAG3 138
51 DAI_P14 95 NC 139
52 DAI_P04 96 NC 140
53 DAI_P18 97 V 141
_
DD EXT
54 DAI_P17 98 NC 142
55 DAI_P16 99 V 143
_
DD INT
56 DAI_P12 100 TRST 144
57 DAI_P15 101 NC 145
58 V 102 EMU 146
_
DD INT
59 DAI_P11 103 DATA0 147
60 V 104 DATA1 148
DD _ EXT
61 V 105 DATA2 149
DD _ INT
62 BOOT_CFG2 106 DATA3 150
63 V 107 TDO 151
_
DD INT
64 AMI_ACK 108 DATA4 152
65 GND 109 V 153
_
DD EXT
66 THD_M 110 DATA5 154
67 THD_P 111 DATA6 155
68 V 112 V 156
_ _
DD THD DD INT
69 V 113 DATA7 157
_
DD INT
70 V 114 TDI 158
DD _ INT
71 MS1 115 SDCLK 159
72 V 116 V 160
DD _ INT DD _ EXT
73 WDT_CLKO 117 DATA8 161
74 WDT_CLKIN 118 DATA9 162
75 V 119 DATA10 163
_
DD EXT
76 ADDR23 120 TCK 164
77 ADDR22 121 DATA11 165
78 ADDR21 122 DATA12 166
79 V 123 DATA14 167
_
DD INT
80 ADDR20 124 DATA13 168
81 ADDR19 125 V 169
DD _ INT
82 V 126 DATA15 170
DD _ EXT
83 ADDR16 127 SDWE 171
84 ADDR15 128 SDRAS 172
85 V 129 RESET 173
_
DD INT
86 ADDR14 130 TMS 174
87 AMI_WR 131 SDCAS 175
88 AMI_RD 132 V 176
_
DD INT
GND 177*
* at BOTTOM
W9864G6KH-6(DIGITAL : U1020)

Pin description

5. PIN DESCRIPTION
PIN NUMBER PIN NAME FUNCTION
23 ~ 26, 22,
A0 A11 Address
29 ~35
20, 21 BS0, BS1 Bank Select
2, 4, 5, 7, 8, 10,
11, 13, 42, 44,
DQ0 DQ15
45, 47, 48, 50,
Input/ Output
51, 53
19 Chip Select
CS
Row Address
18
17
CAS Address Strobe Referred to
16 Write Enable
WE
UDQM
Input/output
39, 15
LDQM
38 CLK Clock Inputs
37 CKE Clock Enable
1, 14, 27 V
DD
28, 41, 54 V
SS
Power for I/O
3, 9, 43, 49 V
DDQ
Ground for I/O
6, 12, 46, 52 V
SSQ
36, 40 NC No Connection No connection.
51
W9864G6KH
DESCRIPTION
Multiplexed pins for row and column address.
Row address: A0 A11. Column address: A0 A7.
A10 is sampled during a precharge command to
determine if all banks are to be precharged or bank
selected by BS0, BS1.
Select bank to activate during row address latch time,
or bank to read/write during address latch time.
Data
Multiplexed pins for data output and input.
Disable or enable the command decoder. When
command decoder is disabled, new command is
ignored and previous operation continues.
Command input. When sampled at the rising edge of
the clock , CAS and WE define the
Strobe
operation to be executed.
Column
Referred to
The output buffer is placed at Hi-Z (with latency of 2)
when DQM is sampled high in read cycle. In write
mask cycle, sampling DQM high will block the write
operation with zero latency.
System clock used to sample inputs on the rising
edge of clock.
CKE controls the clock activation and deactivation.
When CKE is low, Power Down mode, Suspend
mode, or Self Refresh mode is entered.
Power Power for input buffers and logic circuit inside DRAM.
Ground for input buffers and logic circuit inside
Ground
DRAM.
Separated power from V , to improve DQ noise
DD
buffer immunity.
Separated ground from V , to improve DQ noise
SS
buffer immunity.
Publication Release Date: Nov. 12, 2013
- 5 - Revision A02