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MicroGEA MX6 ULL HW manual 1.0.6
DATE
29/11/2017
21/02/2018
05/04/2018
17/07/2018
18/07/2018
17/09/2018
24/10/2018
D N :
Getting started manual
***** REV 1.0.6 *****
REVISION
CHANGE DESCRIPTION
1.0.0
Release
1.0.1
Proofread & correct grammar & added connector code for the Carrier board's interface
1.0.2
Added connector information, moved chapter 7 to the adapter application notes
1.0.3
Added Resistive Touch information. Updated sleep mode current consumption
1.0.4
Updated ordering Information table
1.0.5
Added in-rush current requirements during start-up
1.0.6
Updated ordering code, update mechanical information, updated LCD and touch connections chapter
1
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Related Manuals for ENGICAM MicroGEA MX6ULL 512MB LCD
Summary of Contents for ENGICAM MicroGEA MX6ULL 512MB LCD
- Page 1 MicroGEA MX6 ULL HW manual 1.0.6 Getting started manual ***** REV 1.0.6 ***** DATE REVISION CHANGE DESCRIPTION 29/11/2017 1.0.0 Release 21/02/2018 1.0.1 Proofread & correct grammar & added connector code for the Carrier board's interface 05/04/2018 1.0.2 Added connector information, moved chapter 7 to the adapter application notes 17/07/2018 1.0.3 Added Resistive Touch information.
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Page 2: Table Of Contents
Table of Contents 1. Introduction..............................3 1.1 Introduction................................4 1.2 Acronyms and Abbreviations used........................... 4 1.3 Document and Standard References........................5 1.3.1 External Industry Standard Documents...........................5 1.3.2 NXP Documents..................................5 2. Mechanical data............................6 2.1 Mechanical data............................... 7 2.2 Assembly Top View..............................7 2.3 Assembly Bottom View............................. -
Page 3: Introduction
Chapter 1. Introduction This Chapter gives background information on this document. Section includes： General Overview ✔ Acronyms and Abbreviations Used ✔ Document and Standard References ✔ D N :... -
Page 4: Introduction
1.1 Introduction This document is created to guide users to design MicroGEA compliant carrier board. It will focus only on the interfaces in MicroGEA pinouts and related peripherals. This document helps walk hardware designers through the various stages of designing a carrier board on this platform. Using this document, hardware designers can efficiently locate the resources they need at every step in the board design flow. -
Page 5: Document And Standard References
1.3 Document and Standard References 1.3.1 External Industry Standard Documents • The I2C Specification, Version 2.1, January 2000, Philips Semiconductor (now NXP) (www.nxp.com). • I2S Bus Specification, Feb. 1986 and Revised June 5, 1996, Philips Semiconductor (now NXP) (www.nxp.com). • USB Specifications (www.usb.org). -
Page 6: Mechanical Data
Chapter 2. Mechanical data This Chapter gives information about PCB and module's dimensions. Section includes： Mechanical data ✔ Assembly Top view ✔ Assembly Bottom view ✔ Interface Connectors ✔ D N :... -
Page 7: Mechanical Data
2.1 Mechanical data 2.2 Assembly Top View In the Figure below is shown top view assembly plan. Figure 1 2.3 Assembly Bottom View The Figure below shows the bottom view assembly plan. Figure 2 Note: the connectors interface on module are HRS code DF40C-90DP that mates with HRS code DF40C-90DS (for further details refer to Chapter 2.4) D N :... -
Page 8: Interface Connectors
2.4 Interface Connectors The following information report the connectors, referred to the series DF40 (HRS) compliant with the MicroGEA SOM interface CARRIER CONNECTORS Note: for information on the connectors’ positioning on carrier board, refer to Chapter 5.1.4 D N :... -
Page 9: Ordering Information And Features
Chapter Features 3. Ordering Information and This Chapter gives the ordering information and technical specifications of the modules. Section includes： MicroGEAMX6ULL Ordering code ✔ CPU & memory specifications ✔ Operating temperature range ✔ D N :... -
Page 10: Ordering Information
3.1 Ordering Information Following we provide the ordering information and the description for the Basic technical specifications modules: Part name Ordering Code Description CPU & Memory specifications CPU junction Operating temperature Module available at temperature range °C range °C (excepted CPU) least until MicroGEA MX6ULL 0026800082I130... - Page 11 0026 Reserved Reserved RAM SIZE RAM SIZE 128MB OPTION AVAILABLE 512MB OPTION AVAILABLE No option SPECIFICATIONNON VOLATILE MEMORY SPECIFICATIONNON VOLATILE MEMORY SOM TYPE SOM TYPE 256MB SLC NAND MicroGEA 512MB SLC NAND TEMPERATURE QUALIFIER TEMPERATURE QUALIFIER CPU TYPE RELATED TO SOM Consumer CPU TYPE RELATED TO SOM MCIMX6Y2...
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Page 12: Pinout
Chapter 4. Pinout This Chapter gives the pinout information. Section includes： Pinout overview ✔ i.MX Pad spacifications ✔ Electrical specification ✔ D N :... -
Page 13: Module Pinout
4.1 Module Pinout The module's interface is achieved by 2 connector HRS code DF40C-90DP that mates with HRS code DF40C-90DS on the carrier board, or compatible (for further details refer to Chapter 2.4) A -CONNECTOR J1 NAME PAD on i.MX DESCRIPTION EVEN NAME... - Page 14 NAME PAD on i.MX DESCRIPTION EVEN NAME PAD on i.MX DESCRIPTION GPIO5_3 SNVS_TAMPER3 General GPIO GPIO5_4 SNVS_TAMPER4 General GPIO GPIO5_6 SNVS_TAMPER6 General GPIO GPIO5_1 SNVS_TAMPER1 General GPIO GPIO5_7 SNVS_TAMPER7 General GPIO Ground Ground Not Connect BOOT_MODE0 BOOT_MODE0 Boot mode selection I2C2_SDA GPIO1_IO01 I2C signal (pull-up needed on carrier)
- Page 15 NAME PAD on i.MX DESCRIPTION EVEN NAME PAD on i.MX DESCRIPTION Ground CAN1_TX UART3_CTS CAN TX nSD_BOOT CAN1_RX UART3_RTS CAN RX Table 2 B -CONNECTOR J2 NAME PAD on i.MX DESCRIPTION EVEN NAME PAD on i.MX DESCRIPTION UART8_TXD LCD_DAT20 UART TX OUT DISP0_D10 LCD_DAT10 LCD parallel signal...
- Page 16 NAME PAD on i.MX DESCRIPTION EVEN NAME PAD on i.MX DESCRIPTION GPIO2_IO09 ENET2_RX_DATA1 General GPIO DISP0_HSYNC LCD_HSYNC LCD parallel signal GPIO3_23 LCD_DAT18 General GPIO DISP0_VSYNC LCD_VSYNC LCD parallel signal GPIO2_IO15 ENET2_RX_ER General GPIO DISP0_DRDY LCD_ENABLE LCD parallel signal GPIO2_IO11 ENET2_TX_DATA0 General GPIO DISP0_CLK LCD_CLK...
- Page 17 NAME PAD on i.MX DESCRIPTION EVEN NAME PAD on i.MX DESCRIPTION SD2_CLK CSI_VSYNC USDHC2 Clock signal SD1_CLK SD1_CLK uSDHC1 Clock signal SD2_CMD CSI_HSYNC uSDHC2 cmd signal SD1_CMD SD1_CMD uSDHC1 cmd signal Ground Ground Table 3 The yellow rows highlight the required minimum electrical connections in order to make the module working correctly. Note: for the use of this pin refer to boot option in “Boot Mode Pin”...
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Page 18: Electrical Specifications
4.2 Electrical specifications V Min (Volts) V Typ (Volts) V Max (Volts) + 3,3 VBUS_OTG_USB, VBUS_USB 4,70 5,35 GPIO V(oh) + 3,15 GPIO V(ol) + 0,15 GPIO V(ih) + 2,35 + 3,3 GPIO V(il) Table 4 This measure has done testing the module's start at the limit temperatures of -40°C and +85°C Module Test condition Current @Vin Min... -
Page 19: Carrier Board Design
Chapter 5. Carrier Board Design This Chapter gives the technical specifications for carrier board design. Section includes： Carrier Board recommendations ✔ Power signals and backup battery ✔ Serials ✔ CAN Bus ✔ Ethernet ✔ ✔ SDIO ✔ ✔ ✔ Resistive Touch screen ✔... -
Page 20: Carrier Board Recommended Specifications
5.1 Carrier board recommended specifications 5.1.1 Planarity in finish process Due to the technical and mechanical specifications of the connector we suggest the maximum planarity of the footprint on PCB, so we suggest a type of finish obtained by horizontal process (we suggest and use for our carrier boards a type Chemical Gold finish). 5.1.2 Planarity of PCB Also the planarity of the entire Printed Circuit Board must be kept in check especially when the carrier board grows in size. -
Page 21: How To Power The Module
5.2 How to power the module Read carefully the related sections before starting the power stage design. This module needs to be supplied with a +3.3Vin power. Refer to the table below for the power supply range specification. The power dissipated by the module in the operating mode is about 200 mA, but the system must provide at least a power of 1A at 3.3V to allow the start of the module. -
Page 22: How To Connect A Backup Battery
5.2.1 How to connect a backup battery The module allows the use of lithium rechargeable battery or supercapacitor as backup battery. The connection with module is obtained by connecting directly the backup battery to the +Vcoin signal (pin 18 floating if not used). Note: The module is already designed to manage the charge of backup battery. -
Page 23: How To Connect Two 3-Wire Rs232 Serial Port
5.3 How to connect two 3-wire RS232 serial port This section shows how to use the UART1 and UART5 as 3-wire RS232 serial ports. The following table shows the UART1 and UART5 pins numbering. A Connector Name Primary Function Description CPU Pin Name GPIO Capable Voltage... -
Page 24: How To Connect A Rs485 Serial Port
5.4 How to connect a RS485 serial port This chapter is shows how an RS485 serial port can be connected to the module. The figure below shows how UART3 is used to connect to a RS485 transceiver on the starter kit. The figure shows UART3 connection but you can consider that also UART 4 & 5 can be used to connect a RS485 transceiver. -
Page 25: How To Connect Can Bus Interfaces
5.5 How to connect CAN BUS interfaces This chapter describes how CAN bus transceiver can be connected to a module. The figure below shows how CAN bus1 and 2 are connected in the evaluation board. Both CAN buses have been implemented. Figure 6 The following table describes the pins' numbering in the main connector involved in the CAN interface A Connector... -
Page 26: How To Design The Ethernet Interface
5.6 How to design the Ethernet interface The NXP i.MX6UL Ethernet Media Access Controller (MAC) is designed to support both 10 and 100 Mbps Ethernet/IEEE standard 802.3™ networks. The 10-Mbps and 100-Mbps RMII Ethernet physical interfaces is supported. The figure shows how to connect the Ethernet interface to module. - Page 27 In order to reduce the module consume during the power down Engicam provide the module with the pin 3V3_ETH that give to the user the possibility to switch off the Ethernet PHY during this working mode (command echo mem > /sys/class/power/state These pins 15, 17, 19 of the B Connector (J2) can be connected, on the carrier board, to the 3V3 using a circuitry as the follow.
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Page 28: Component Placement Considerations
5.6.1 Component Placement considerations Components placement can affect signal quality, emissions and can decrease EMI problems. If the magnetics are a discrete component than the distance from the connector RJ45 should be kept to under 25mm of separation. To decrease EMI problems the distance between magnetics and Phy should be at least 25mm or greater to isolate the PHY from magnetics. -
Page 29: Cable Transient Event And Phy Protection
5.6.2 Cable Transient Event and PHY Protection Cable transient events are + and - DC surges that are induced across the transformer onto the PHY side of the TX+/- and RX+/- signals as shown in the figure below. The PHY side of the transformer should not contain any DC component other than the typical 3.3V pull-up on the center tap of the transformer for analog signal biasing. -
Page 30: Phy Ethernet
5V. D3 and D4 act the same way when the transient is across the RX+/- differential pair. The total capacitance seen by each differential pair must not exceed 50pF (25pF single ended). Figure 11 Recommended by ENGICAM: Diode array TVS, 4 CH, ESD, 3.3V Wurth Elektronik 824013... -
Page 31: Usb Interface
5.7 USB interface 5.7.1 How to connect the USB OTG interface The NXP i.MX6UL USB module provides high performance USB On-The-Go (up to 480Mbps), compatible with the USB 2.0 specification. An OTG HS PHY is also integrated so no external OTG PHY is needed on the baseboard. The figure shows how the MINI- AB USB/OTG connector is powered and connected in the evaluation board. - Page 32 The following figures show two different ways to connect the USB OTG interface that may be used to work as either a host or a device. Use of the USB OTG port as a Host with its own dedicated supply. The ID signal is forced to GND. Figure 13 Use of the USB OTG port as Device.
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Page 33: How To Connect The Usb Host Interface
5.7.2 How to connect the USB host interface The module provides one port for USB host interface. The figure shows how to connect this port to the Module. Figure 15 A Connector Name Primary Function Description CPU Pin Name GPIO Capable Voltage USB HOST interface USB_OTG2_VBUS... -
Page 34: How To Connect The Sd Card Interface
5.8 How to connect the SD CARD interface The NXP i.MX6UL Ultra Secured Digital Host Controller (uSDHC) provides the interface between the host system and MMC/SD/SDIO cards, including cards with reduced size or mini cards. The module includes these features and the figure shows how the Micro SD Card connector is connected to MicroGEA Module in the evaluation board. -
Page 35: How To Connect An Lcd Display
5.9 How to connect an LCD display 5.9.1 Connection map for 18 bit display The following map represent the connection mode applied to 18 bit TFT display. For every connection the colour controlled is joined B Connector Name Primary Function CPU Pin Name 18 bit TFT GPIO... -
Page 36: Connection Map For 24 Bit Display
5.9.2 Connection map for 24 bit display The following map represent the connection mode applied to 24 bit TFT display. For every connection the colour controlled is joined B Connector Name Primary Function CPU Pin Name 18 bit TFT GPIO Voltage Description Capable... -
Page 37: Epd Interface
5.10 EPD Interface The following map represent the EPD connection. EPD peripheral is available only for parts equipped with Y7 processors A Connector B Connector Name Primary Function Description CPU Pin Name Voltage EPDC_PWRCTRL01 Panel power control (sw controlled) UART4_RX_DATA +3,3V EPDC_SDOEZ Source driver output enable to zero... -
Page 38: Resistive Touch Screen
5.11 Resistive touch screen TSC is responsible for providing control of ADC and touch screen analogue block to form a touch screen system, which achieves function of touch detection and touch location detection. The controller utilizes ADC hardware trigger function and control switches in touch screen analogue block. -
Page 39: Boot Mode Pin
5.12 Boot Mode Pin Boot mode pins 47, 49 of the A Connector determines how the module boot. The following table lists the possible options of the boot mode: BOOT_MODE1 (PIN 49) BOOT_MODE0 (PIN 47) Action Boot From Fuses Serial Downloader Internal Boot (DEFAULT) Reserved Table 19... - Page 40 The signal used to configure the boot is implemented on pin 89. In the standard condition the signal is setting to boot from internal module memory device (jumper left open), closing the jumper the module start from SD card. Figure 18 Following you can see the signals logical level to implement a custom starting sequence.
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Page 41: Boot Signals Management
The NXP documentation declares the above signals as BOOT_CFG signals but no other information (function and reset status) is currently given about them. Basing on the Engicam test result we currently suggest leaving all these signals floating during reset status and it's strongly recommended to consult the NXP's documentation before starting the carrier board design. -
Page 42: How To Connect The Audio Interface
5.13 How to connect the Audio Interface The figure shows how to connect the module I2S interface to a low-power stereo codec, e.g. NXP SGTL5000, that includes headphones and is designed to provide a comprehensive audio solution for portable products that require line-in, mic-in, line-out, headphone-out and digital I/O. -
Page 43: Peripheral Multiplexing
Chapter 6. Peripheral multiplexing This Chapter gives the alternative peripheral information Section includes： ✔ ✔ ✔ ✔ UART ✔ ✔ ✔ ✔ D N :... -
Page 44: Peripheral Multiplexing Description
6.1 Peripheral multiplexing description Following we describe opportunity to use alternative interfaces using the properties of multiplexing pin. Refer to the NXP's reference manual and documentation for further details. 6.1.1 SPI Interfaces Using pin multiplexing 's features we may have the following SPI and IIS connections. The tables below show the output signals on the Connector's module. -
Page 45: Iis Configuration
6.1.2 IIS Configuration The following tables show the pin configurations for IIS Bus on module's connector. IIS1 bus interfaces Pin on connector A Pin on connector B Pin Name on i.MX MicroGEA Signal Voltage reference reference LCD_DAT03 I2S_DIN +3,3V CSI_DATA06 LCD_DAT04 I2S_DOUT +3,3V... -
Page 46: Alternative Pwm Pins Table
6.1.3 Alternative PWM pins table It's possible to set the pins shown in the following table as PWM signals. Pin on connector A Pin on connector B Pin Name on i.MX MicroGEA Signal Voltage reference reference GPIO_IO08 LCD_DAT00 PWM-1 +3,3V GPIO_IO09 LCD_DAT01 PWM-2... -
Page 47: Iic Configuration
6.1.4 IIC Configuration IIC1 Interfaces Pin on connector A Pin on connector B Pin Name on i.MX MicroGEA Signal Voltage reference reference UART4_TX_DATA CSI_PIXCLK I2C1_SCL +3,3V GPIO1_IO02 GPIO1_IO03 CSI_MCLK I2C1_SDA +3,3V UART4_RX_DATA Table 30 IIC2 Interfaces Pin on connector A Pin on connector B Pin Name on i.MX MicroGEA Signal... -
Page 48: Alternative Uart Pins Tables
6.1.5 Alternative UART PINs tables The following tables shows an alternative UART configuration UART1 interfaces Pin on connector A Pin on connector B Pin Name on i.MX MicroGEA Signal Voltage reference reference GPIO1_IO06 UART1_CTS (Output) +3,3V UART1_CTS_B GPIO1_IO07 UART1_RTS (Input) +3,3V UART1_RTS_B GPIO1_IO00... - Page 49 UART5 interfaces Pin on connector A Pin on connector B Pin Name on i.MX MicroGEA Signal Voltage reference reference CSI_DATA03 UART5_CTS (Output) +3,3V CSI_DATA02 UART5_RTS (Input) +3,3V GPIO1_IO04 CSI_DATA00 UART5_TXD (Output) +3,3V UART5_TX_DATA GPIO1_IO05 CSI_DATA01 UART5_RXD (Input) +3,3V UART5_RX_DATA Table 38 UART6 interfaces Pin on connector A Pin on connector B...
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Page 50: Sd Interfaces
6.1.6 SD Interfaces Pin on connector A Pin on connector B Pin Name on i.MX MicroGEA Signal Voltage reference reference GPIO1_IO03 CSI_DATA05 SD1_CD +3,3V UART1_RTS SD1_DATA0 SD1_D0 +3,3V SD1_DATA1 SD1_D1 +3,3V SD1_DATA2 SD1_D2 +3,3V SD1_DATA3 SD1_D3 +3,3V SD1_CLK SD1_CLK +3,3V SD1_CMD SD1_CMD +3,3V... -
Page 51: Alternatives Can Bus Interfaces
6.1.7 Alternatives CAN bus interfaces CAN 1 BUS Interface Pin on connector A Pin on connector B Pin Name on i.MX MicroGEA Signal Voltage reference reference UART3_CTS_B LCD_DAT08 CAN1_TX +3,3V SD1_DATA0 UART3_RTS_B LCD_DAT09 CAN1_RX +3,3V Table 44 CAN 2 BUS Interface Pin on connector A Pin on connector B Pin Name on i.MX... -
Page 52: On-Line Support
Engicam explicitly reserves the rights to change or add to the contents of this manual or parts of it without special notification. All operating parameters must be validated for each customer application by customer’s technical experts.
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