Linear Technology DC1840A Demo Manual page 6

DEMO MANUAL DC1840A
Demonstration circuit 1682a operation
2
I C Communication and Addressing
The LTC4271 internal registers are accessed via I
and/or write configuration, status, and interrupt registers.
2
The I C lines SDAOUT, SDAIN and SCL connect to the
34-pin connector (Figure 7). Subsequently, the I
is accessed on the DC1680A.
The LTC4270/LTC4271 chipset has an address of
(A 10A A A A b), where A
6 3 2 1 0
logic state of the AD6, AD3, AD2, AD1, and AD0 pins
respectively. On the DC1682A, AD0 and AD1 are tied low
with pull-down resistors. AD2, AD3 and AD6 are brought
out to the 34-pin connector (Figure 7) and set with three
switches on the DC1680A.
SDAOUT
SDAIN
SCL
INT
LTC4271
AD6
AD3
AD2
AD1
AD0
DGND
DC1840A F07
Figure 7. DC1682A LTC4271 I
I/O LED Indicators
The DC1682A features four LEDs to indicate the states of
the LTC4270/LTC4271 chipset general purpose input output
pins. These pins are configured as inputs or outputs via
2
I C. GP1 and GP0 are referenced to DGND and driven by
the LTC4271 when set as outputs (Figure 8). XIO0 and
XIO1 are referenced to V
EE
when set as outputs (Figure 9). J2 provides test points
for access to these I/Os.
6
2
C to read
2
C bus
, A , A , A , and A are the
6 3 2 1 0
R7
0
SDAOUT
SDAIN
SCL
TO 34-PIN
INT
CONNECTOR
AD6
AD3
AD2
R8 R9
0 0
2
C and Address Connections
and are driven by the LTC4270
R30
27k
D4
GRN
XIO1
Q13A
BC846AS
R32
220k
J2, PIN 9
J2, PIN 10
V
EE
Figure 8. DC1682A, LTC4270 General Purpose I/O LED Indicators
V
DD33
LTC4271
GP1
GP0
DGND
DC1840A F09
Figure 9. DC1682A, LTC4271 General Purpose I/O LED Indicators
V
DD33
LTC4271
AUTO
MID
DGND
DC1840A F10
Figure 10. DC1682A AUTO and MID Jumpers
AGND
R31
27k
D5
GRN
XIO0
3
LTC4270
Q13B
5
BC846AS
R33
4
220k
XIO1
XIO0
V
EE
DC1840A F08
R28 R29
560 560
2 2
D2 D3
GRN GRN
GP1 GP0
1 1
J2, PIN 5
J2, PIN 6
V
DD33
JP1 JP2
AUTO MID
HI HI
LO LO
J2, PIN 3
J2, PIN 4
dc1840afb