Linear Technology DC1840A Demo Manual page 5

Demonstration circuit 1682a operation
Board Layout
Proper board layout is crucial for proper LTC4270/LTC4271
chipset operation, robustness, and accuracy. When lay-
ing out, pay attention to parts placement, Kelvin sensing,
power paths, and copper fill. It is imperative to follow the
LTC4270/LTC4271 Layout Guide document when laying
out the board.
C21
0.1µF
V
DD33
CPD
U1
LTC4271
C23
1µF
CND
DPD
C22
1µF
DND
DGND
V
DD33
T1
– –
RX RD
R13
100
CT(4) CT(3)
R14
100
+ +
RX RD
– –
TX TD
R15
100
CT(2) CT
R16
100
+ +
TX TD
C24, 2nF
WÜRTH 7490100143
2kV
V
EE
Figure 6. DC1682A Digital and Analog Isolation
DEMO MANUAL DC1840A
Isolation and Power Supplies
The LTC4270/LTC4271 chipset provides communication
across an isolation barrier through a data transformer
(Figure 6). This eliminates the need for expensive opto-
couplers. All digital pins reside on the digital ground refer-
ence and are isolated from the analog PoE supply. A 3.3V
supply for V and an isolated V
DD
to the DC1682A through the 34-pin connector.
CPA
R21
100
U2
LTC4270
AGND
R22
100
CNA
DPA
R23
100
R24
V
100 EE
DNA
V
EE
ISOLATION
supply are connected
EE
34-PIN
CONNECTOR
DC1682A SIDE DC1680A SIDE
+
–
C19
D1
+
1µF
SMAJ58A –
100V
DC1840A F06
V SUPPLY
DD33
V SUPPLY
EE
dc1840afb
5