2.2
Clock Settings
This section describes the clock settings. For JP1 and SW1, refer to Figure 2-1.
Table 2-1. Clock Setting (When the Emulator is Used as a Stand-Alone Unit)
Clock Supply Source Setting
Clock Supply Method
Internal clock
PLL mode
Direct mode
Note Setting any other state is prohibited.
Table 2-2. Clock Setting (When the Emulator is Used in Target System Connection)
Clock Supply Source Setting
Clock Supply Method
Internal
PLL mode
clock/target
Note 2
clock
Direct mode
Notes 1. Setting any other state is prohibited.
2. Switching the internal clock and target clock is done with the debugger.
CHAPTER 2
NAME AND FUNCTION OF COMPONENTS
JP1 Setting
2
1
JP1 Setting
2
1
Clock Mode Setting
Note
SW1 Setting (CKSEL Setting)
8
7
Clock Mode Setting
Note 1
SW1 Setting
(CKSEL Setting)
PLL
8
7
DIRECT
PLL
DIRECT
PLL
DIRECT
PLL
DIRECT
CKSEL Setting of
Target System
Low level
High level
21