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LG 47LY960H Service Manual page 27

Chassis ld4bz

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System Configuration
Clock for M14
MAIN Clock(24Mhz)
C101
10pF
XTAL_IN
R180
10pF
560
XTAL_OUT
C102
System Clock for Analog block(24Mhz)
SoC & DDR Speed
PLL SET[1:0] : internal pull up
"00" : CPU(1200Mhz),M0 / M1 DDR(792,792 Mhz)
"01" : CPU(1056Mhz),M0 / M1 DDR(672,672 Mhz)
"10" : CPU(1056Mhz),M0 / M1 DDR(792,792 Mhz)
"11" : CPU( 960Mhz),M0 / M1 DDR(792,792 Mhz)
Extenal test only
OPT
R103
3.3K
PLLSET1
R104
3.3K
PLLSET0
OPT
OP MODE[1:0]
"00" : Normal Mode
"01/10/11" : Internal Test mode
+3.3V_NORMAL
OPT
R101
3.3K
OPM1
R102
3.3K
OPM0
OPT
Extenal test only
+3.3V_NORMAL
+3.3V_NORMAL
INSTANT boot MODE
BOOT MODE
"1 : Instant boot
"0 : EMMC
"1 : TEST MODE
"0 : normal
(internal pull down)
BOOT_MODE
INSTANT_BOOT
BOOT_MODE0
INSTANT_MODE0
+3.3V_NORMAL
+3.3V_NORMAL
+3.3V_TUNER
+3.3V_TUNER
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
M14-Peripheral
Copyright
2014 LG Electronics Inc. All rights reserved.
Only for training and service purposes
NVRAM
Write Protection
- Low
: Normal Operation
+3.5V_ST
- High : Write Protection
+3.5V_ST
IC104
R110
M24M01-HRMN6TP
4.7K
OLD_EE
R109
0
NC
VCC
1
8
OPT
C107
E1
WP
0.1uF
2
7
16V
A0
R111
0
E2
SCL
R112
33
3
6
SCL_NVRAM
NEW_EE
VSS
SDA
R113
33
4
5
SDA_NVRAM
NVRAM I2C SWITCH
EEPROM_SW
CONNECTION
NVRAM - NEC
L
B0 - A
H
B1 - A
NVRAM - M14
EEPROM_SW
NLASB3157DFT2G
+3.5V_ST
SELECT
6
ON SEMICONDUCTOR
ANALOG SWITCH
VCC
5
C103
0.1uF
A
4
SCL_NVRAM
EAN38256201
NLASB3157DFT2G
SELECT
6
ON SEMICONDUCTOR
ANALOG SWITCH
VCC
5
C104
0.1uF
A
4
SDA_NVRAM
EAN38256201
I2C
I2C_1 : AMP
I2C_2 : T-CON,L/DIMING,EYE SENSOR
I2C_3 : Pro:Idiom
I2C_4 : S/Demod,T2/Demod, LNB
I2C_5 : NVRAM
I2C_6 : TUNER_MOPLL(T/C,ATV)
I2C PULL UP
I2C_SDA1
I2C_SCL1
I2C_SDA3
I2C_SCL3
I2C_SDA2
I2C_SCL2
I2C_SDA4
I2C_SCL4
I2C_SDA5
I2C_SCL5
I2C_SDA6
I2C_SCL6
+3.3V_NORMAL
SOC_RESET
L/DIM0_SCLK
L/DIM0_MOSI
IC105
B1
1
I2C_SCL5
+3.5V_ST
GND
2
R114
2.7K
B0
3
NEC_EEPROM_SCL
IC106
B1
1
I2C_SDA5
+3.5V_ST
GND
2
R115
2.7K
B0
3
NEC_EEPROM_SDA
PWM_DIM2
PWM_DIM
EMMC_CLK
EMMC_CMD
EMMC_RST
EMMC_DATA[0-7]
IC101
LG1311
R123
B23
AN9
XTAL_IN
XIN_MAIN
USB2_0_DP0
10K
A23
AM9
XTAL_OUT
XO_MAIN
USB2_0_DM0
OPT
AN8
USB2_0_TXRTUNE
R169
AG21
PORES_N
H32
33
USB2_1_DP0
AJ18
J31
BOOT_MODE
BOOT_MODE
C108
USB2_1_DM0
H33
0.1uF
USB2_1_TXRTUNE
16V
AB8
PLLSET0
PLLSET0
AC8
N31
PLLSET1
PLLSET1
USB3_DP0
N32
USB3_DM0
AD8
P33
OPM0
USB3_TXP0
OPM0
AE8
P32
OPM1
OPM1
USB3_TXM0
M32
AR101
USB3_RXP0
33
Y7
M33
L/DIM0_VS
L_VSOUT_LD/TRST0_N
USB3_RXM0
Y6
P31
USB3_RESREF0
DIM0_SCLK/TMS0
W7
DIM1_SCLK/TCK0
W6
K33
DIM1_MOSI/TDI0
USB3_DP1
R178
33
W5
K32
USB3_DM1
DIM0_MOSI/TDO0
L32
USB3_TXP1
AG30
L31
SPI_CS0
USB3_TXM1
AG28
K31
USB3_RXP1
SPI_SCLK0
AG29
J32
SPI_DO0
USB3_RXM1
AH29
M31
TRST_N1
SPI_DI0/TRST1_N
USB3_RESREF1
AJ27
TMS1
SPI_CS1/TMS1
AH27
W28
TCK1
SPI_SCLK1/TCK1
HUB_PORT_OVER0
AG26
W29
TDO1
HUB_VBUS_CTRL0
SPI_DO1/TDO1
AH26
TDI1
SPI_DI1/TDI1
H28
EB_CS3
OPT
R182
10K
AJ12
J30
EB_CS2
EXT_INTR0
R183
10K
AJ13
J28
EXT_INTR1
EB_CS1
R184
10K
AH12
J29
EXT_INTR2
EB_CS0
R185
10K
AG12
EXT_INTR3
G30
EB_WE_N
AH23
F30
SOC_RX
UART0_RXD
EB_OE_N
AG22
H29
SOC_TX
UART0_TXD
EB_WAIT
AH7
G29
UART1_RXD
EB_BE_N1
AJ7
G28
UART1_TXD
EB_BE_N0
AG8
P28
UART1_RTS_N
CAM_CD1_N
AH8
P27
UART1_CTS_N
CAM_CD2_N
U28
CAM_CE1_N
AH11
R29
I2C_SCL1
SCL0
CAM_CE2_N
AG11
V27
I2C_SDA1
SDA0
CAM_IREQ_N
AH9
T28
I2C_SCL3
SCL1
CAM_RESET
AG9
T29
I2C_SDA3
SDA1
CAM_INPACK_N
AG10
R28
I2C_SCL2
SCL2
CAM_VCCEN_N
AJ9
U27
I2C_SDA2
SDA2
CAM_WAIT_N
AH22
N29
I2C_SCL4
SCL3
CAM_REG_N
AJ22
I2C_SDA4
SDA3
AH10
I2C_SCL5
SCL4
AJ10
K30
I2C_SDA5
SDA4
EB_ADDR0
AG23
E30
I2C_SCL6
SCL5
EB_ADDR1
AH24
M30
I2C_SDA6
SDA5
EB_ADDR2
N28
EB_ADDR3
AC6
M28
PWM0
EB_ADDR4
33
AC7
M29
R107
PWM1
EB_ADDR5
33
R108
AD7
L29
R179
PWM2
EB_ADDR6
10K
AB7
K29
PWM_IN
EB_ADDR7
K28
1/16W
EB_ADDR8
5%
L28
EB_ADDR9
G32
D30
EMMC_CLK
EB_ADDR10
G33
F29
EMMC_CMD
EB_ADDR11
G31
C32
EMMC_RESETN
EB_ADDR12
EMMC_DATA[7]
D31
C33
EMMC_DATA7
EB_ADDR13
EMMC_DATA[6]
F33
C31
EMMC_DATA6
EB_ADDR14
EMMC_DATA[5]
F32
B33
EMMC_DATA5
EB_ADDR15
EMMC_DATA[4]
E32
EMMC_DATA4
EMMC_DATA[3]
F31
EMMC_DATA3
EMMC_DATA[2]
D33
B32
EMMC_DATA2
EB_DATA0
EMMC_DATA[1]
D32
A32
EMMC_DATA1
EB_DATA1
EMMC_DATA[0]
E31
B31
EMMC_DATA0
EB_DATA2
A31
EB_DATA3
A30
EB_DATA4
B30
EB_DATA5
C30
EB_DATA6
C29
EB_DATA7
xxLY960H-ZA
PAGE 1
WIFI_DP
WIFI_DM
1%
200
R171
USB_DP3
USB_DM3
1%
200
R172
USB_DP2
USB_DM2
1%
200
R174
/USB_OCD2
USB_CTL2
/USB_OCD3
USB_CTL3
EB_WE_N
TP104
EB_WE_N
TP105
EB_OE_N
EB_OE_N
EB_BE_N1
TP106
EB_BE_N1
TP107
EB_BE_N0
EB_BE_N0
TP108
CAM_CD1_N
CAM_CD1_N
CAM_CD2_N
TP109
CAM_CD2_N
/PCM_CE1
/PCM_CE1
TP110
TP111
/PCM_CE2
/PCM_CE2
CAM_IREQ_N
CAM_IREQ_N
TP112
TP113
PCM_RESET
PCM_RESET
CAM_INPACK_N
CAM_INPACK_N
TP114
PCM_5V_CTL
PCM_5V_CTL
TP115
TP116
CAM_WAIT_N
CAM_WAIT_N
CAM_REG_N
CAM_REG_N
TP117
EB_ADDR[0]
EB_ADDR[1]
EB_ADDR[2]
EB_ADDR[3]
EB_ADDR[4]
EB_ADDR[5]
EB_ADDR[6]
EB_ADDR[7]
EB_ADDR[8]
EB_ADDR[9]
EB_ADDR[10]
EB_ADDR[11]
EB_ADDR[12]
EB_ADDR[13]
EB_ADDR[14]
EB_ADDR[0-14]
TP102
EB_DATA[0]
EB_ADDR[0-14]
EB_DATA[1]
EB_DATA[2]
EB_DATA[3]
EB_DATA[4]
EB_DATA[5]
EB_DATA[6]
EB_DATA[7]
EB_DATA[0-7]
TP103
EB_DATA[0-7]
Jtag-1 I/F
+3.3V_NORMAL
P104
12505WS-10A00
OPT
1
TRST_N1
2
TDI1
3
TDO1
4
TMS1
5
TCK1
6
SOC_RESET
7
8
9
10
11
2014.06.23
1
M14-Peripheral
LGE Internal Use Only

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