Sony Vaio VGN-S36C Service Manual page 35

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Detailed Description
The MAX1992/MAX1993 buck controllers are ideal for
low-voltage power supplies for notebook computers.
Maxim's proprietary Quick-PWM pulse-width modulator
in the MAX1992/MAX1993 is designed for handling fast
load steps while maintaining a relatively constant oper-
ating frequency and inductor operating point over a
wide range of input voltages. The Quick-PWM architec-
ture circumvents the poor load-transient timing prob-
lems of fixed-frequency current-mode PWMs while
avoiding the problems caused by widely varying
switching frequencies in conventional constant-on-time
and constant-off-time PWM schemes.
See Table 1 for component selections and Table 2 for a
list of component suppliers.
+5V Bias Supply (V
The MAX1992/MAX1993 require an external 5V bias
supply in addition to the battery. Typically, this 5V bias
supply is the notebook 's 95%-efficient 5V system sup-
ply. Keeping the bias supply external to the IC improves
efficiency and eliminates the cost associated with the 5V
linear regulator that would otherwise be needed to sup-
ply the PWM circuit and gate drivers. If stand-alone
capability is needed, the 5V supply can be generated
with an external linear regulator such as the MAX1615.
The 5V bias supply must provide V
and V
(gate-drive power), so the maximum current
DD
drawn is:
I
= I
+ f
(Q
BIAS
CC
SW
= 2mA to 20mA (typ)
where I
is 550µA (typ), f
CC
and Q
and Q
G(LOW)
G(HIGH)
sheet's total gate-charge specification limits at V
The V+ battery input and 5V bias inputs (V
can be connected together if the input source is a fixed
4.5V to 5.5V supply. If the 5V bias supply is powered
up prior to the battery supply, the enable signal ( SHDN
going from low to high) must be delayed until the bat-
tery voltage is present in order to ensure startup.
Free-Running Constant-On-Time PWM
Controller with Input Feed Forward
The Quick-PWM control architecture is a pseudofixed-
frequency, constant on-time, current-mode regulator
with voltage feed forward (Figure 2). This architecture
relies on the output filter capacitor 's ESR to act as a
current-sense resistor, so the output ripple voltage pro-
vides the PWM ramp signal. The control algorithm is
simple: the high-side switch on-time is determined sole-
ly by a one-shot whose pulse width is inversely propor-
tional to input voltage and directly proportional to
output voltage. Another one-shot sets a minimum off-
time (400ns typ). The on-time one-shot is triggered if
the error comparator is low, the low-side switch current
is below the valley current-limit threshold, and the mini-
mum off-time one-shot has timed out.
and V
CC
DD
(PWM controller)
CC
+ Q
)
G(LOW)
G(HIGH)
is the switching frequency,
SW
are the MOSFET data
= 5V.
GS
and V
CC
DD
The heart of the PWM core is the one-shot that sets the
high-side switch on-time. This fast, low-jitter, adjustable
one-shot includes circuitry that varies the on-time in
response to battery and output voltage. The high-side
switch on-time is inversely proportional to the battery
voltage as measured by the V+ input and is proportional
to the output voltage:
On-time = K (V
BLOCK DIAGRAM
V+
ON-TIME
OUT
TON
COMPUTE
t
ON
)
Q
TRIG
1-SHOT
ERROR
AMP
1.14 x
INTREF
ENABLE
OVP
FAULT
LATCH
QUAD
OVP/UVP
LEVEL
DECODE
BLANK
20ms
ENABLE
TIMER
UVP
0.7 x
POR
INTREF
SKIP
CSP
ZERO CROSSING
CSN
*OD
0.9 x
1.1 x
*GATE
INTREF
INTREF
MAX1993
ONLY
PGOOD
BLANK
FBLANK
DECODE
*FBLANK
AND TIMER
)
*MAX1993 ONLY. IN THE MAX1993, AGND AND PGND
ARE INTERNALLY CONNECTED AND CALLED GND.
VGN-S36C/S36GP/S36LP/S36SP/S36TP/S38CP/S52B/
S62PS/S62PSY/S62S/S350F/S350FP/S360/S360P/S370F
1-30
On-Time One-Shot (TON)
+ 0.075V) / V
OUT
IN
t
OFF(MIN)
TRIG
Q
MAX1992
1-SHOT
MAX1993
S
Q
R
ILIM
R
Q
S
S
Q
R
SATURATION
CSP
LIMIT
CSN
QUAD
LEVEL
DECODE
V
CC
R
9R
CSP
CURRENT
CSN
LIMIT
0.5V
INTREF
2.0V
REF
13R
0.7V
7R
MAX1992 vs. MAX1993
INTERNAL OPTION
MAX1992
FB DECODE
(FIGURE 7)
DISCHARGE
LOGIC
Confidential
(J/AM/AO)
IC
BST
DH
LX
V
DD
DL
PGND
LSAT
- 1.0V
ILIM
REF
V
CC
AGND
*REFIN
FB
OUT
SHDN

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