Watchdog Sample Program - Asus AAEON GENE-KBU6 User Manual

3.5” subcompact board
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A.2 Watchdog Sample Program
******************************************************************************
// WDT I/O operation relative definition (Please reference to Table 1)
#d efine WDTAddr
Vo id WDTWriteByte(b yte Register, byte Value);
b yt e WDTReadByte(b yte Register);
Vo id WDTSetReg(b yte Register, byte Bit, byte Val);
// Watch Dog relative definition (Please reference to Table 2)
#d efine DevReg
#d efine WDTRstBit 0x80 // Watchdog WDTRST# (Bit7)
#d efine WDTRstVal 0x80 // Enabled WDTRST#
#d efine TimerReg
#d efine PSWidthBit
#d efine PSWidthVal
#d efine PolarityBit 0x02
#d efine PolarityVal 0x00
#d efine UnitBit
#d efine ModeBit
#d efine ModeVal
#d efine EnableBit
#d efine EnableVal
#d efine StatusBit
#d efine CounterReg 0x06
*******************************************************************************
*******************************************************************************
VOID Main(){
// Procedure : AaeonWDTConfig
// (byte)Timer : Counter of WDT timer.(0x00~0xFF)
// (boolean)Unit : Select time unit(0: second, 1: minute).
AaeonWDTConfig(Counter, Unit);
// Procedure : AaeonWDTEnable
// This procudure will enable the WDT counting.
AaeonWDTEnable();
}
*******************************************************************************
Appendix A – Watchdog Timer Programming
0x510
// WDT I/O base address
0x00
// Device configuration register
0x05
// Timer register
0x00
// WDTRST# Pulse width (Bit0:1)
0x01
// 25ms for WDTRST# pulse
// WDTRST# Signal polarity (Bit2)
// Low active for WDTRST#
0x03
// Unit for timer (Bit3)
0x04
// WDTRST# mode (Bit4)
0x01
// 0:level 1: pulse
0x05
// WDT timer enable (Bit5)
0x01
// 1: enable
0x06
// WDT timer status (Bit6)
// Timer counter register
100

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