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A.1
Watchdog T imer Registers
Default Value
I/O Base
0xA 10
A d dress
R egister
Wat chdog
W DTRST#
Enable
P ulse Width
Sig nal Polarity
Co unting Unit
Out put Signal
Typ e
Wat chdog
Timer Enable
Timeout Status
Timer Counter
Appendix A – Watchdog Timer Programming
Tab le 1 : Watch dog relative IO address
I/O Base address for Watchdog operation.
This address is assigned by SIO LDN7, register 0x60-0x61.
Tab le 2 : Watchdog relative register table
Offset
B itNum
0x00
7
0x05
0: 1
0x05
2
0x05
3
0x05
4
0x05
5
0x05
6
0x06
N o te
Value
Enable/Disable
time
out
1
WDTRST#
0: Disable
1: Enable
Width of Pulse signal
00: 1ms (do not use)
01: 25ms
01
10: 125ms
11: 5s
P ulse width is must longer
t hen 16ms.
0: low active
0
1: high active
Mus t set this bit to 0
Select time unit.
0
0: second
1: minute
0: Level
1
1: Pulse
Mus t set this bit to 1
0: Disable
1
1: Enable
1: timeout occurred. Write a
1
1 to clear timeout status
Time of watchdog timer
(0~255)
N o te
output
via
99
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