Asus AAEON FWS-7520 User Manual page 13

3.5.3.3 PCH Configuration: SATA Configuration (IDE) ........................ 69
3.5.3.4 PCH Configuration: SATA Configuration (AHCI) .................... 70
3.5.3.5 PCH Configuration: SATA Configuration (RAID) ......................71
3.6 Setup submenu: Server Mgmt (Option) ............................................................... 72
3.6.1 Server Mgmt: System Event Log ................................................................ 74
3.6.2 Server Mgmt: BMC self test log .................................................................. 75
3.6.2 Server Mgmt: View FRU information ........................................................ 76
3.6.3 Server Mgmt: BMC network configuration ............................................. 77
3.6.3.1 BMC network configuration: View System Event Log .......... 78
3.6.3.2 BMC network configuration: BMC User Settings ................... 79
3.7 Setup submenu: Security ........................................................................................... 80
3.8 Setup submenu: Boot ................................................................................................. 81
3.9 Setup submenu: Save & Exit .................................................................................... 82
Chapter 4 - Drivers Installation ............................................................................................ 83
4.1 Drivers Installation ....................................................................................................... 84
Appendix A - Watchdog Timer Programming ................................................................... 85
A.1 Watchdog Timer Initial Program ............................................................................. 86
Appendix B - I/O Information .............................................................................................. 92
B.1 I/O Address Map .......................................................................................................... 93
B.2 Memory Address Map ............................................................................................... 95
B.3 IRQ Mapping Chart ..................................................................................................... 98
Appendix C - Standard LAN Bypass Platform Setting ......................................................115
C.1 Status LED ..................................................................................................................... 116
C.2 LAN Bypass ................................................................................................................... 119
C.3 Software Reset Button (General Propose Input) .............................................. 122
Preface XIII