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Chapter 2
Hardware Overview
High-Speed Timing
Acquisition and ROI
Scatter-Gather DMA Controllers
Device Configuration NVRAM
Start Conditions
NI PCI-1424 User Manual
The high-speed timing circuitry on the NI 1424, built from high-speed
counters, allows you to specify or generate precise, real-time control
signals. You can map the output of this circuitry to a trigger line to provide
accurate pulses and pulse trains.
The acquisition and region-of-interest (ROI) circuitry monitors the
incoming video signals and routes the active pixels to the multiple-tap data
formatter and SDRAM memory. In an ROI acquisition, you select an area
within the acquisition window to transfer to the PCI bus.
The NI 1424 uses three independent onboard direct memory access (DMA)
controllers. The DMA controllers transfer data between the onboard
SDRAM memory buffers and the PCI bus. Each of these controllers
supports scatter-gather DMA, which allows the DMA controller to
reconfigure on-the-fly. Thus, the NI 1424 can perform continuous image
transfers directly to either contiguous or fragmented memory buffers.
The NI 1424 contains onboard nonvolatile RAM (NVRAM) that
configures all registers on power-up.
The NI 1424 can start acquisitions in a variety of conditions:
•
Software control—The NI 1424 supports software control of
acquisition start. You can configure the NI 1424 to capture a
fixed number of fields or frames. This configuration is useful for
capturing a single frame or a sequence of frames.
•
Trigger control—You can start an acquisition by enabling external
or RTSI bus trigger lines. Each of these inputs can start a video
acquisition on a rising or falling edge.
•
Delayed acquisition—You can use either software or triggers to start
acquisitions instantaneously or after skipping a specific period of time.
You can use delayed acquisition for posttrigger applications.
•
Frame/field selection—With an interlaced camera and the NI 1424 in
frame mode, you can program the NI 1424 to start an acquisition on
any odd or even field.
2-4
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