6VA+
4.7. CHIPSET FEATURES SETUP
Figure 4.4: Chipset Features Setup
Top Performance
The default value is Disabled
Disabled
Disabled Top Performance.
Enabled
Enabled Top Performance.
SDRAM Cycle Length
The default value is 3.
3
For Slower SDRAM DIMM module.
2
For Fastest SDRAM DIMM module.
Auto
CAS latency time will be set automatically if you have SPD
on SDRAM.
DRAM Clock
The default value is Host CLK.
Host CLK
Set DRAM Clock to Host CLK.
HCLK+33M
Set DRAM Clock to HCLK+33M.
Auto
Set DRAM Clock to Auto.
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