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KD-SX975 / KD-SX875
QQ
3 7 63 1515 0
Description of major ICs
UPD178078GF-543 (IC701): SYSTEM CPU
1.Terminal layout
2.Block diagram
TO0/VTR-CONT
TI00/POWER
TI01/CD-ON
TI50/MUTE
TO50/NC
TI51/STAGE
TO51/NC
SI0/SB0/SDA0/NC
TE
L 13942296513
SO0/SB1/SDA1/VOL-DA
SCK0/SCL/VOL-CLK
SI1/JBUS-SI
SO1/JBUS-SO
SCK1/JBUS-SCK
STB/NC
BUSY/NC
SI3/NC
SO3/LCD-DA
SCK3/SCL/LCD-CLK
TXD0/LM1
RXD0/LM0
INTP0/NC
8
INTP7/NC
BEEP0/BUZZER
BUZ/NC
RESET
X1
X2
V
PORT
DD
GNDPORT
V
DD
www
VM45/VTR-LOGIC
REGOSC
REGCPU
GND0
GND1
1-14
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100 ~ 81
1
80
30
51
31 ~ 50
16-bit TIMER/
EVENT COUNTER
8-bit TIMER/
EVENT COUNTER 0
8-bit TIMER/
EVENT COUNTER 1
WATCHDOG TIMER
BASIC TIMER
78k/0
SERIAL
CPU
INTERFACE 0
CPRE
SERIAL
INTERFACE 1
SERIAL
INTERFACE 3
UART0
INTERRUPT
CONTROL
BUZER OUTPUT
RESET
CPU
SYSTEM
PERIPHERAL
CONTROL
VOLTAGE
V
OSC
x
ao
y
V
REGULATOR
CPU
.
i
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8
ROM
PD178078
Q Q
3
6 7
:60Kbyte
PD178076
:48Kbyte
RAM
PD178078
:3Kbyte
PD178076
:2Kbyte
u163
PLL
VOLTAGE
REGULATOR
2 9
9 4
NC,JBUS-INT,SW1,
8
PORT 0
REMOCON,PS1,PS2,
DETACH,NC
PORT 1
8
KEY0,KEY1,KEY2,LEVEL,
SM,OPEN.NC,
JBUS-SI,JBUS-SO,
PORT 2
8
JBUS-SCK,NC,VOL-DA,
VOL-CLK
VTR-LOGIC,VTR-CONT,
PORT 3
8
POWER,CD-ON,MUTE,
NC.BUZZER.NC
PORT 4
8
NC
1 3
1 5
0 5
NC,LCD-CE,SW2,SW3,
8
2 9
PORT 5
8
SW4,RST-SW,ENC1,ENC2
MONO,SEEK/STOP,
PORT 6
8
FM/AM.DIM IN.ANTENNA.
TEL MUTING.STAGE1.STAGE2
NC,LCD-DA,LCD-CLK,
PORT 7
8
JBUS-/O,LM0,LM1,BUCK,
CCE
3
SD/ST,NC,IFC
PORT10
PORT 12
5
BUS0,BUS1,BUS2,BUS3,
RST
PORT 13
8
NC
AN10/KEY0
8
AN17/NC
A/D
CONVERTER
AV
DD
AV
SS
FREQUENCY
AMIFC/NC
COUNTER
FMIFC/IFC
EO0
m
EO1
PLL
VCOL
co
VCOH
.
V
PLL
DD
GNDPLL
IC
GND2
2 8
9 9
9 4
2 8
9 9
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