ADLINK Technology aTCA-3430 User Manual page 6

aTCA-3430 User's Manual
List of Tables
Table 1: aTCA-3430 Specifications ..................................................................................................................................... 11
Table 2. Serial Console Port Pinout .................................................................................................................................... 13
Table 3. Serial Console Port Configuration Values ............................................................................................................. 13
Table 4. RJ-45 Management Port Pinout ............................................................................................................................ 13
Table 5. Front Panel LEDs and Markers ............................................................................................................................. 15
Table 6. Ground Header Settings (JP3) .............................................................................................................................. 18
Table 7. XAUI_SEL Status Settings (JP5)........................................................................................................................... 19
Table 8. JTAGSEL Pin Definition (JP8)............................................................................................................................... 19
Table 9. SPI Flash or SD Card Selection (SW1) ................................................................................................................. 21
Table 10. Faceplate Serial Port Selection (SW2) ................................................................................................................ 21
Table 11. Multi-function Switch (SW3) ................................................................................................................................ 22
Table 12. Programmable Devices ....................................................................................................................................... 22
Table 13. Firmware Image and File Name .......................................................................................................................... 33
Table 14. LMP U-Boot Boot-up Failover Actions ................................................................................................................. 39
Table 15. Summary of Devices and Access ........................................................................................................................ 41
Table 16. LMP State Descriptions ....................................................................................................................................... 42
Table 17. LMP State Transition Descriptions ...................................................................................................................... 43
Table 18. Boot Sequence State Descriptions ...................................................................................................................... 44
Table 19. Non-volatile Memory Map.................................................................................................................................... 44
List of Figures
Figure 1. aTCA-3430 Block Diagram................................................................................................................................... 10
Figure 2. Configurable Component Locations ..................................................................................................................... 17
Figure 3. Ground Header Schematic (JP3) ......................................................................................................................... 18
Figure 4. XAUI_SEL Status Header Schematic (JP5) ......................................................................................................... 18
Figure 5. JTAGSEL Mode Header Schematic (JP8) ........................................................................................................... 19
Figure 6. IPMC JTAG Header Schematic (JP9) .................................................................................................................. 20
Figure 7. CPLD JTAG Header Schematic (JP12)................................................................................................................ 20
Figure 8. Switching I/O between Front Panel and Base Switch .......................................................................................... 35
Figure 9. U-Boot Redundancy Flow .................................................................................................................................... 39
Figure 10. LMP SDK/BSP Porting ....................................................................................................................................... 40
Figure 11. LMP State Machine ............................................................................................................................................ 42
Figure 12. aTCA-3430 Boot Sequence ............................................................................................................................... 43
Figure 13. Broadcom SDK Porting ...................................................................................................................................... 45
Figure 14. aTCA-3430 Software Overview.......................................................................................................................... 58
Figure 15. IPMI Function Blocks.......................................................................................................................................... 59
Figure 16. Broadcom SDK Function Blocks ........................................................................................................................ 60
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