Panasonic SA-PM65MD Service Manual page 54

Pin Mark I/O
No.
54 VCOF2 I/O
55 SUBC
56 SBCK
57 VSS
58 X1 IN
59 X2 OUT
60 VDD
61 BYTCK
62 /CLDCK
63 FCLK
64 IPFLAG
65 FLAG
66 CLVS
67 CRC
Function
VCO loop Filter for
33.8688 MHz
Conversion Terminal
for 16.9344 Mhz Crystal
mode, Must use other
Circuit)
O Sub-Code Serial Data
Output (Not Used,
Open)
I Clock Input for Sub-
Code Serial Data)
I GND
I
Crystal Oscillating
Circuit Input
(f= 16.9344 MHz)
O
Crystal Oscillating
Circuit Input
(f= 16.9344 MHz)
I Power Supply Input
(For Oscillating Circuit)
O Byte Clock Output (Not
Used, Open)
O
Sub-Code Frame Clock
Signal Output
(fCLDCK= 7.35 kHz
During Normal
Playback)
O
Crystal Frame Clock
Signal Output)
(fCLDCK= 7.35 kHz)
O
Interpolation Flag
Output
("H": Interpolation)
(Not Used, Open)
O Flag Output (Not Ised,
Open)
O
Spindle Servo Phase
Synchronizing Signal
Output
("H": CLV, "L": Rough
Servo) (Not used, Open)
O
Sub-Code CRC
Checked Output
("H": OK, "L" NG) (Not
Used, Open)
54