Samsung DVD-A500 Service Manual page 15

Reference Information
2-1-5 DIC2 (KM416C254BJ-6 ; CMOS DRAM)
RAS
UCAS
Control
Clocks
LCAS
W
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
AO
.
.
Col. Address Buffer
A8
NAME
A 0 - A 8
D Q 0 - 1 5
VSS
R A S
UCAS
L C A S
W
O E
V
CC
N . C
2-8
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BLOCK DIAGRAM
VBB Generator
Row Decoder
Memory Array
262,144 x 16
Cells
Column Decoder
Address Inputs
D a t a i n / O u t
Ground
Row Address Strobe
Upper Column Address Strobe
Lower Column Address Strobe
R e a d / W r i t e I n p u t
D a t a O u t p u t E n a b l e
P o w e r ( + 5 V )
P o w e r ( + 3 . 3 V )
No Connection
Vcc
Vss
FUNCTION
Lower
Data in
DQ0
Buffer
to
DQ7
Lower
Data out
Buffer
OE
Upper
Data in
DQ8
Buffer
to
DQ15
Upper
Data out
Buffer
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