Timer Data Organization - Epson RTC-4543SA Applications Manual

Real time clock module
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RTC - 4543 SA/SB

6. Timer Data Organization

The counter data is BCD code.
The timer automatically adjusts for different month lengths and for leap year.
The time is indicated in 24-hour format.
Writes and reads are both performed on an LSB-first basis.
Second
( 0 to 59 )
Minutes
( 0 to 59 )
Hour ( 0 to 23 )
Day of the week
( 1 to 7 )
Day ( 1 to 31 )
Month ( 1 to 12 )
Year ( 0 to 99 )
* bits: Any data may be written to these bits.
FDT bit: Supply voltage detection bit
This bit is set to "1" when voltage of 1.7 0.3 V or less is detected between V
The FDT bit is cleared if all of the digits up to the year digits are read.
Although this bit can be both read and written, normally set this bit to "0".
V
DD
Detection
pulse
Mode
FDT bit
The supply voltage detection circuit monitors the supply voltage once every 0.5 seconds;
if the supply voltage is lower than the detection voltage value, the FDT bit is set to "1".
TM bit: This is a test bit for SEIKO-EPSON's use. Always set this bit to "0".
MSB
FDT
s40
*
mi40
mi20
*
*
*
*
TM
*
y80
y40
V
DET
0.5 s
s20
s10
s8
mi10
mi8
h20
h10
h8
*
d20
d10
d8
*
mo10
mo8
y20
y10
y8
0.5 s
Read
Page - 6
LSB
s4
s2
s1
mi4
mi2
mi1
h4
h2
h1
w4
w2
w1
d4
d2
d1
mo4
mo2
mo1
y4
y2
y1
and GND.
DD
MQ - 252 - 03

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