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SIGNALCORE SC5319A Hardware Manual

20 ghz to 40 ghz rf downconverter
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Hardware Manual
SC5319A & SC5320A
20 GHz to 40 GHz RF Downconverter
Preliminary Rev 0.1
www.signalcore.com
© 2021 SignalCore, Inc. All Rights Reserved

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Summary of Contents for SIGNALCORE SC5319A

  • Page 1 Hardware Manual SC5319A & SC5320A 20 GHz to 40 GHz RF Downconverter Preliminary Rev 0.1 www.signalcore.com © 2021 SignalCore, Inc. All Rights Reserved...

  • Page 2: Table Of Contents

    Table of Contents General Information ......................4 Warranty ..........................4 Copyright & Trademarks ......................4 Warnings Regarding Use of SignalCore Products ............... 6 Physical Description ......................7 Unpacking ..........................7 Setting Up the Device ....................... 7 Front Interface Indicators and Connectors ................8 Signal Connections ......................
  • Page 3 USB Interface ........................... 1 Control Transfer ........................ 1 Bulk Transfer........................1 SPI Interface ..........................2 Writing the SPI Bus ......................3 Reading the SPI Bus......................3 RS232 Interface ........................4 Rev 0.1 | SC5319A & SC5320A Hardware Manual SignalCore, Inc.
  • Page 4 General Information Writing to the Device Via RS232 ..................4 Reading from the Device Via RS232 ................... 5 PXI Express ..........................5 Setting Up the PCI to Serial Bridge ..................5 Writing to the Device ......................6 Reading from the Device ....................6 Calibration ..........................

  • Page 5: General Information

    SignalCore reserves the right to make changes to subsequent editions of this document without prior notice to possessors of this edition. Please contact SignalCore if errors are suspected. In no event shall SignalCore be liable for any damages arising out of or related to this document or the information contained in it.
  • Page 6 General Information products. Use of SignalCore products is restricted to applications that do not infringe on the intellectual property rights of others. “SignalCore”, “signalcore.com”, and the phrase “preserving signal integrity” are registered trademarks of SignalCore, Incorporated. Other product and company names mentioned herein are trademarks or trade names of their respective companies.

  • Page 7: Warnings Regarding Use Of Signalcore Products

    BECAUSE EACH END-USER SYSTEM IS CUSTOMIZED AND DIFFERS FROM SIGNALCORE'S TESTING PLATFORMS, AND BECAUSE A USER OR APPLICATION DESIGNER MAY USE SIGNALCORE PRODUCTS IN COMBINATION WITH OTHER PRODUCTS IN A MANNER NOT EVALUATED OR CONTEMPLATED BY SIGNALCORE, THE USER OR...

  • Page 8: Physical Description

    As each device’s integrated system configuration is unique, detailed cooling options cannot be provided. A cooling plan is sufficient when the SC5319A and SC5320A on-board temperature sensors indicate a rise of no more than 20°C above ambient temperature under normal operating conditions.

  • Page 9: Front Interface Indicators And Connectors

    PXI Pic Figure 1 The SC5319A is a PXIe-based RF downconverter with all user I/O located on the front face of the module. The SC5320A is a serial controlled core module with all user connections on the front face of the module.

  • Page 10: Device Led Indicators

    Physical Description measurement performance. Clean out any loose, dry debris from connectors with clean, low- pressure air (available in spray cans from office supply stores). If deeper cleaning is necessary, use lint-free swabs and isopropyl alcohol to gently clean inside the connector barrel and the external threads.

  • Page 11: Communication And Supply Connection

    SFSD-15-28-H-10.00-SR, is provided with the product. The pin definitions are listed in Table 3. Pinouts are different for different SignalCore products with the same connector type. Please ensure that mating connectors and cables are wired correctly before connection. Table 3. Interface connector pin out description...
  • Page 12 Physical Description Figure 4. Proper Removal of Latching-Style Ribbon Connectors. ©2021 Rev 0.1...

  • Page 13: Mini-Usb Connection

    All user settings will be lost. System reset capability can also be accessed through the communication header connector. Rev 0.1 | SC5319A & SC5320A Hardware Manual SignalCore, Inc.

  • Page 14: Functional Description

    Functional Description 3 Functional Description Overview The SC5320A uses USB as its primary interface with an optional SPI or RS232 interface. The SC5319A is a PXIe version of the product. The downconverter assembly consists of 2 module parts: • The Signal Conversion Module contains the mixers, filters, signal amplifiers, and attenuators. This module is referred to as the “signal chain”.

  • Page 15: The Rf Input

    1. The default is the conversion path where the RF signal is converted to an IF. 2. The alternate path is directly to the IF output port, bypassing all means of frequency conversion. The upper frequency limit of this bypass path is 40 GHz. Rev 0.1 | SC5319A & SC5320A Hardware Manual SignalCore, Inc.

  • Page 16: The Rf Conversion Path

    Functional Description When the conversion path is bypassed, the IF output is disabled and the internal LO is powered down. The RF Conversion Path The first device in the RF conversion path is a step attenuator with 0.5 dB step resolution. This attenuator (RF_ATTEN) is used to control the signal level at the mixer or at the RF preamplifier if it is enabled.

  • Page 17: Signal Chain Configurations

    RF preamplifier, the input spectral noise floor is typically lower than -165 dBm/Hz. The flexible use of these attenuators and pre-amplifier allows the downconverter to achieve better than 190 dB of measurement dynamic range. Rev 0.1 | SC5319A & SC5320A Hardware Manual SignalCore, Inc.

  • Page 18: The Lo Synthesizer

    Functional Description The LO Synthesizer The internal LO synthesizer is a hybrid between integer-N PLL and DDS, enabling it to tune at 1 Hz steps while maintaining low phase noise. The master reference signal for the generation of the LO signal comes either from an internal Oven Controlled Crystal Oscillator (OCXO) or an external signal source as shown below in Figure 7.

  • Page 19: Lo Port

    Thus, these downconverters are tolerant to “dirty” external power supplies. To LO & SignalChain Module +18V, +10V, +5V, +3.3V, -5V, -10V Switchers and regulators SC5319A SC5320A Figure 8. Block diagram of the power and interface module Rev 0.1 | SC5319A & SC5320A Hardware Manual SignalCore, Inc.

  • Page 20: Hardware Registers

    Hardware Registers 4 Hardware Registers The set of hardware registers of the downconverter may be divided into a configuration set and a query set; the configuration registers are write-only registers to set up the states of the device, while the query registers request the device to prepare and send back data associated with them. The registers are identical for all communication interfaces: PXIe, USB, RS232, and SPI.

  • Page 21: Register 0X01 Initialize

    This register turns on or off the active LED indicator on the front connector interface of the device. This register should be called when the device is opened or closed in software. Bytes written 2 Bytes read 1 Rev 0.1 | SC5319A & SC5320A Hardware Manual SignalCore, Inc.

  • Page 22: Register 0X03 Synth_Mode (2 Bytes)

    Hardware Registers Bits Type Name Width Description 0 = Turns off the active LED Mode 1 = Turns on the active LED [7:1] Unused Set to zeros [7:0] Read back byte Read 1 byte back is required for PXIe and RS232 Register 0x03 SYNTH_MODE (2 Bytes) This register configures the PLL loop gain of the local oscillator synthesizers.

  • Page 23: Register 0X11 If_Frequency

    0 = Use internal synthesizer LO source select 1 = Use external source [7:1] Unused Set to zeros [7:0] Read back byte Read 1 byte back is required for PXIe and RS232 Rev 0.1 | SC5319A & SC5320A Hardware Manual SignalCore, Inc.

  • Page 24: Register 0X14 Rf_Amp

    Hardware Registers Register 0x14 RF_AMP This register enables and disables the RF amplifier. Bytes written 2 Bytes read 1 Bits Type Name Width Description 0 = Disables the RF amplifier RF Preamp Enable 1 = Enables the RF amplifier [7:1] Unused Set to zeros [7:0]...

  • Page 25: Register 0X17 If_Out_Enable

    Read back byte Read 1 byte back is required for PXIe and RS232 Register 0x19 IF_SIDEBAND_SEL This register selects either the upper sideband conversion or the lower sideband conversion. Bytes written 2 Rev 0.1 | SC5319A & SC5320A Hardware Manual SignalCore, Inc.

  • Page 26: Register 0X1A Reference_Clock

    Width Description LockEnable 0 = Uses internal 10 MHz TCXO Only on SC5319A to enable export of the 10 MHz PXI10Enable backplane clock, this bit is ignored in the SC5320A. Set the reference port (SMA) to as input or output...

  • Page 27: Register 0X1C Store_Default_State

    1 = Powers down the synthesizer only 2 = Powers down the device [7:2] Unused Set to zeros [7:0] Read back byte Read 1 byte back is required for PXIe and RS232 Rev 0.1 | SC5319A & SC5320A Hardware Manual SignalCore, Inc.

  • Page 28: Register 0X1F Auto_Conv_Params

    Hardware Registers Register 0x1F AUTO_CONV_PARAMS The device uses these desired parameters to automatically determine the path, attenuator, and preamplifier settings that will best meet their requirements. Bytes written 8 Bytes read 1 Bits Type Name Description Software use, bit to enable computation of gain AUTO Conv Enable and setting of it.

  • Page 29: Register 0X30 Get_Device_Param

    Returned Data (See Device Parameter Data section [63:0] Read back bytes for more info) Register 0x31 GET_TEMPERATURE Write to this register to query the device temperature. Bytes written 2 Bytes read 8 Rev 0.1 | SC5319A & SC5320A Hardware Manual SignalCore, Inc.

  • Page 30: Register 0X32 Get_Device_Status

    Hardware Registers Bits Type Name Width Description [7:0] Unused Set to zeros These 32 bits of data need to be type casted back to float. i.e. var_float = *(float*)&var_u32 where [31:0] Temperature Data var_u32 is some unsigned integer that holds the 32 bits of read data.

  • Page 31: Register 0X33 Get_Device_Info

    Writing to this register only provides the 64 clock edges (Reg + 7 data bytes) to transfer serial data from the device through SPI. Other interfaces do not use this register. Bytes read 8 Rev 0.1 | SC5319A & SC5320A Hardware Manual SignalCore, Inc.

  • Page 32: Device Parameters Data And Format

    Hardware Registers Bits Type Name Width Description [55:0] Unused Zeros, just to provide clocking for SPI data from device [63:0] Data 8 bytes of data Device Parameters Data and Format The data read back from the GET_DEVICE_PARAM register has a total of 8 bytes, however not all bytes contain valid data.

  • Page 33: Device Information Parameters And Format

    Byte 5 Byte 4 Byte 3 Byte 2 Byte 1 Byte 0 Parameter Name type INTERFACE/SN Intrfce Serial Number REVISIONS hardware revision Firmware revision DATES Mfg year Month Cal year Month Rev 0.1 | SC5319A & SC5320A Hardware Manual SignalCore, Inc.
  • Page 34 Hardware Registers Interface Information The first 4 bytes contain the device serial number as an unsigned 32-bit integer. Byte [4] contains the interface as represented in the following table. Table 8. Interface ID Bit Description [0] PXI/PXIe (1 if available) [1] USB [2] SPI [3] RS232...
  • Page 35 Section 2 Communication Interfaces and Calibration © 2021 SignalCore, Inc. All Rights Reserved...

  • Page 36: Communication Interfaces

    Communication Interfaces 5 Communication Interfaces The SC5319A has a PXI express interface, while the SC5320A has 2 communication interfaces: 1. USB and SPI 2. USB and RS232 This section will examine the communication aspects of the product, focusing on data transfer to and from the device on each interface.

  • Page 37: Spi Interface

    The clock rate may be as high as 2.0 MHz (�� �� SPI signals do not have sufficient integrity due to trace issues, the rate should be lowered. Rev 0.1 | SC5319A & SC5320A Hardware Manual SignalCore, Inc.

  • Page 38: Writing The Spi Bus

    Communication Interfaces Byte N (MSB) DATA 8 Bit Command/ Reg. Address Byte N-1 (LSB) Figure 10. SPI timing. As mentioned above, the SPI architecture limits the byte rate since after every byte transfer the input and output SPI buffers need to be cleared and loaded respectively by the device SPI engine. Data is transferred between the input buffer and internal register buffers.

  • Page 39: Rs232 Interface

    6 bytes (address plus data), then all 6 bytes must be sent even though the last byte may be null. The device, upon receiving the first register addressing byte, Rev 0.1 | SC5319A & SC5320A Hardware Manual...

  • Page 40: Reading From The Device Via Rs232

    A simple driver using IO controls should be sufficient to read and write byte data to this block of addresses. Although SignalCore provides the driver and API for these products, information is provided here for users who may need to write drivers for a different operating system or a different driver.

  • Page 41: Writing To The Device

    8. All 8 bytes must be read to fully clear the transfer buffer; the first byte read is the most significant byte. Rev 0.1 | SC5319A & SC5320A Hardware Manual SignalCore, Inc.

  • Page 42: Calibration

    Calibration 6 Calibration Calibration EEPROM Map Table 10 represents the EEPROM map of the device calibration values. All values are stored as little- endian 4-byte floating point numbers. Every point is 4-bytes long. Access to the data is possible through the CAL_EEPROM_READ register, which reads 8 bytes starting at the address pointed to by the register input.

  • Page 43: Conversion Gain

    1. Compute the absolute gain value by interpolation because there is no measurement value at 28.1 GHz. A simple linear interpolation between the measured 28.0 GHz and 28.25 GHz values Rev 0.1 | SC5319A & SC5320A Hardware Manual SignalCore, Inc.
  • Page 44 Calibration would provide a good estimate. A local spline interpolation over 5-6 surrounding points would provide better accuracy. Let us call this value ��(����). 2. Compute the relative RF attenuator value by interpolation because there is no measurement value at 28.1 GHz. A simple linear interpolation between the measured 28.0 GHz and 28.25 GHz values would provide a good estimate.

  • Page 45: Revision Table

    SC5319A & SC5320A Hardware Manual Revision Table Revision Revision Date Description 10/19/21 Document Created, preliminary Rev 0.1 | SC5319A & SC5320A Hardware Manual SignalCore, Inc.

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