Copyright & Trademarks ........................ 4 International Materials Declarations ..................... 5 CE European Union EMC & Safety Compliance Declaration ............5 Warnings Regarding Use of SignalCore Products ................5 Physical Description ..........................6 Unpacking ............................6 Setting Up the Device ........................6 Front Interface Indicators and Connectors ..................
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Writing the SPI Bus ........................ 3 Reading the SPI Bus ....................... 3 RS232 Interface ..........................4 Writing to the Device Via RS232 .................... 4 Reading from the Device Via RS232 ..................5 PXI ..............................5 Rev 1.1 | SC5317A & SC5318A Hardware Manual SignalCore, Inc.
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General Information Setting Up the PCI to Serial Bridge ..................5 Writing to the Device......................5 Reading from the Device ....................... 6 Calibration ............................. 6 Calibration EEPROM Map ......................6 Absolute Conversion Gain ......................7 Absolute Gain of the RF Conversion Path ..................8 Gain Through the Bypass RF Conversion Path ................
SignalCore reserves the right to make changes to subsequent editions of this document without prior notice to possessors of this edition. Please contact SignalCore if errors are suspected. In no event shall SignalCore be liable for any damages arising out of or related to this document or the information contained in it.
SignalCore, Incorporated uses a fully RoHS compliant manufacturing process for our products. Therefore, SignalCore hereby declares that its products do not contain restricted materials as defined by European Union directive 2002/95/EC (EU RoHS) in any amounts higher than limits stated in the directive.
SignalCore suggests providing either moderate airflow across the RF housing, or if active cooling is not an option, using thermal interface materials to bond the RF housing to a larger heatsinking surface (i.e. a system enclosure).
Front Interface Indicators and Connectors The SC5317A is a PXIe-based RF downconverter with all user I/O located on the front face of the module. The SC5318A is a serial controlled core module, whose front face connections are shown in Figure 1.
A mating pig-tail cable, part number SFSD-15-28-H-10.00-SR, is provided with the product. The pin definitions are listed in Table 3. Pinouts are different for different SignalCore products with the same connector type. Please ensure that mating connectors and cables are wired correctly before connection.
3 Functional Description Overview The SC5318A uses USB as its primary interface with an optional SPI or RS232 interface. The SC5317A is a PXIe version of the product. The downconverter assembly consists of 2 module parts: •...
GHz to greater than 26.5 GHz. The upper limit to which the device tunes to above 26.5 GHz varies slightly from unit to unit depending on the limits of the oscillator circuitry. The usability of the upper out-of- bounds region depends on the roll-off response of the mixer. Rev 1.1 | SC5317A & SC5318A Hardware Manual SignalCore, Inc.
Functional Description Front LO / Rear LO Reference DC coupled DC coupled 6 GHz RF Bypass 10 MHz Output Reference In 50 IF_ATTEN 50 MHz 6 GHz DSA 0 to 31.75 dB 10 M - 3.5 GHz LO Out 3.5 GHz .25 dB step IF Out ~DC to 3.5 GHz...
The RF pre-amplifier should be enabled if necessary and/or RF attenuation reduced. The IF attenuator is then used to adjust the final IF output level. The drawback is Rev 1.1 | SC5317A & SC5318A Hardware Manual...
Functional Description that the signal level starts off higher as it enters the first mixer as well as subsequent components such that the apparent linearity of the device is lower. To set the device for better linearity, the gain should be shifted to the output IF path, after the mixer, and reducing the gain in the RF path.
Hardware Registers bytes is the sum of the register address (1 Byte) and its corresponding data bytes. For example, to set the RF frequency value, eight bytes must be written; the sum of the 1 register byte and 7 data bytes. See the RF_FREQUENCY register of Table 5.
Read back byte Read 1 byte back is required for PXIe and RS232 Register 0x10 RF_FREQUENCY This register tunes the device to the input RF frequency. Bytes written 8 Bytes read 1 Rev 1.1 | SC5317A & SC5318A Hardware Manual SignalCore, Inc.
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Hardware Registers Bits Type Name Width Description Frequency word in milli-Hz (mHz), mHz used for [55:0] Frequency word future compatibility [7:0] Read back byte Read 1 byte back is required for PXIe and RS232 Register 0x11 IF_FREQUENCY This register sets the final IF value. Bytes written 2 Bytes read 1 Bits Type...
1 = Bypasses the conversion, switches RF input directly to RF output 0 = Turns off RF preamplifier RF Amp Enable 1 = Turns on RF preamplifier IF Out Enable 0 = Disables the IF output port Rev 1.1 | SC5317A & SC5318A Hardware Manual SignalCore, Inc.
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Hardware Registers Bits Type Name Width Description 1 = Enables the IF output port 0 = Sets the LO to invert the IF spectrum Invert Spectrum 1 = Sets the LO to not invert the IF spectrum [7:4] Not used Set to zeros [7:0] Read back byte...
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Bytes written 2 Bytes read 1 Bits Type Name Width Description LockEnable 0 = uses internal 10 MHz TCXO Only on SC5317A to enable export of the 10 MHz PXI10Enable backplane clock [7:2] Unused Set to zeros [7:0] Read back byte...
Hardware Registers Bits Type Name Width Description [23:8] Address EEPROM address [7:0] Read back byte Read 1 byte back is required for PXIe and RS232 Register 0x1F SYNTH_SELF_CAL This register will start the YIG synthesizer calibration. Note that although the calibration procedure takes about 6-8 seconds to complete, the register returns a byte almost immediately.
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Bits Type Name Width Description [7:0] Unused Set to zeros These 32 bits of data need to be type casted back [31:0] Temperature Data to float. i.e. var_float = *(float*)&var_u32 where Rev 1.1 | SC5317A & SC5318A Hardware Manual SignalCore, Inc.
Hardware Registers Bits Type Name Width Description var_u32 is some unsigned integer that holds the 32 bits of read data. [63:32] Invalid data Ignore Register 0x32 GET_DEVICE_STATUS Write to this register to query the current operating conditions. Bytes written 2 Bytes read 8 Bits Type...
Information data (see Device Info data) Register 0x34 CAL_EEPROM_READ Write to this register to query 8 bytes of data from the calibration EEPROM at the starting address. Bytes written 4 Bytes read 8 Rev 1.1 | SC5317A & SC5318A Hardware Manual SignalCore, Inc.
Hardware Registers Bits Type Name Width Description [15:0] Address Starting EEPROM address [23:16] Unused Zeros [63:0] Data 8 bytes of data, LSB is the byte at the start address Register 0x35 USER_EEPROM_READ Write to this register to query 8 bytes of data from the user EEPROM at the starting address. Bytes written 4 Bytes read 8 Bits Type...
Byte 5 Byte 4 Byte 3 Byte 2 Byte 1 Byte 0 Parameter Name type INTERFACE/SN Intrfce Serial Number REVISIONS hardware revision Firmware revision DATES Mfg year Month Cal year Month Rev 1.1 | SC5317A & SC5318A Hardware Manual SignalCore, Inc.
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Hardware Registers Interface Information The first 4 bytes contain the device serial number as an unsigned 32-bit integer. Byte [4] contains the interface as represented in the following table. Table 8. Interface ID Bit Description [0] PXI/PXIe (1 if available) [1] USB [2] SPI [3] RS232...
Communication Interfaces 5 Communication Interfaces The SC5317A has a PXI express interface, while the SC5318A has 2 communication interfaces: 1. USB and SPI 2. USB and RS232 This section will examine the communication aspects of the product, focusing on data transfer to and from the device on each interface.
= 0.2 ), however, if the external SPI signals do not have clock rate may be as high as 5.0 MHz (T sufficient integrity due to trace issues, the rate should be lowered. Rev 1.1 | SC5317A & SC5318A Hardware Manual SignalCore, Inc.
Communication Interfaces Byte N (MSB) DATA 8 Bit Command/ Reg. Address Byte N-1 (LSB) Figure 8. SPI timing. As mentioned above, the SPI architecture limits the byte rate since after every byte transfer the input and output SPI buffers need to be cleared and loaded respectively by the device SPI engine. Data is transferred between the input buffer and internal register buffers.
The device, upon receiving the first register addressing byte, will wait for all the associated data bytes before acting on the register instruction. Failure to complete the register transmission will cause the device to behave erratically or hang. Information for writing to the Rev 1.1 | SC5317A & SC5318A Hardware Manual SignalCore, Inc.
A simple driver using IO controls should be sufficient to read and write byte data to this block of addresses. Although SignalCore provides the driver and API for these products, information is provided here for users who may need to write drivers for a different operating system or a different driver.
4-byte floating point numbers. Every point is 4-bytes long. Access to the data is possible through the CAL_EEPROM_READ register, which reads 8 bytes starting at the address pointed to by the register input. Rev 1.1 | SC5317A & SC5318A Hardware Manual SignalCore, Inc.
1900 MHz and 2000 MHz, so a simple linear interpolation between 2 points should be sufficient. Call this correct gain value (). 4. The gain for this configuration is calculated using: (5, ) = () + () − − (2) _ _ Rev 1.1 | SC5317A & SC5318A Hardware Manual SignalCore, Inc.
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Calibration If the current device temperature is different from the calibration temperature, the gain correction due to temperature difference is computed using ∆ = (1) − + (1) ( − ∆ is the gain correction, (1) and (1) are the first and second order temperature ...
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