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Pin Function (5/5)
The teletext clock and data inputs are shared PIO pins, as shown in
High speed data port pins have a dual function, and can be used either to interface to an external IEEE 1394 link layer
controller or provide an IEEE 1284 parallel port interface.
Pin
1284Data0-7 / AVData0-7
1284notSelectIn
1284notInit / AVPacketTag3
1284notFault / AVPacketTag2
1284notAutoFd / AVPacketTag1
1284Select / AVPacketTag0
1284PError / AVByteClkValid
1284Busy / AVPacketClk
1284notAck / AVByteClk
1284notStrobe/AVPacketError
Pin
TDI
TDO
TMS
TCK
notTRST
PIO pins and alternative functions
To improve flexibility and to allow the STi5512 to fit into different set-top box application architectures, the input and
output signals from some of the peripherals are not directly connected to the pins of the device. Instead they are
assigned to the alternative function inputs and outputs of a PIO port bit. This scheme allows these pins to be configured
as general purpose PIO if the associated peripheral input or output is not required in that particular application.
Table 17
shows the assignment of the alternative functions to the PIO bits. Parentheses ( ) in the table indicate
suggested or possible pin usages as a PIO, not an alternative function connection.
Alternative function of PIO pins
Port
bit
PIO port 0
0
ASC0TxD or
Sc1DataOut
1
ASC0TRxD or
Sc1DataIn
2
Sc1ClkGenExtClk
3
Sc1Clk
4
(Sc1RST)
5
(Sc1CmdVcc)
6
(Sc1CmdVpp)
Sc1Dir
7
(Sc1Detect)
In/Out
Function
in/out
IEEE 1284 port data or AV data
in
IEEE 1284 port control signals or AV signals
in
out
in
out
out, in/out
out, in/out
out
in
Table 13 High-speed data port pins
In/Out
Function
in
Test data input
out
Test data output
in
Test mode select
in
Test clock
in
Test logic reset
Table 14 TAP pins
PIO port 1
PIO port 2
SSC0 MTSR
ASC2TxD or
Sc0DataOut
SSC0 MRST
ASC2RxD or
Sc0DataIn
SSC0 SClk
Sc0ClkGenExtClk
PWMOut0
Sc0Clk
PWMOut1
(Sc0RST)
ASC1TxD
(Sc0CmdVcc)
ASC1RxD
(Sc0CmdVpp) Sc2Dir CompareOut2
PWMOut2
(Sc0Detect)
Table 15 Alternative function of PIO pins
DBR-T210GBS, DBR-T210GBP
DBR-T210GBN
Table 15
.
PIO port 3
PIO port 4
SSC1 MTSR
ASC3TxD
SSC1 MRST
ASC3RxD
SSC1 SClk
TtxtClockIn
CaptureIn0
1284PeriphLogicH/ASC3 CTS
CaptureIn1
1284HostLogicH/ASC3 RTS
CaptureIn2
Interrupt2
Interrupt3
1284InnotOut
TtxtData
47
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