Table of Contents
Advertisement
Schematic Diagram page
19
/28
12/10
PW01→PW01(Power)PW02(Signal)
Del
RW37,RW38,RW39,RW40,CW11
PW01
501568-14H
1
2
3
4
CW06
100p-C
5
1005
6
7
8
9
10
CW05
100p-C
11
1005
12
13
CW04
14
470p
1005
G1
G2
GND1
PW02
FH28-50HLow
1
2
1005
3
CW09
1
2
100p-C
4
1
2
5
CW10
100p-C
6
7
1005
8
9
10
11
12
13
14
コネクタのピン近くに配置
15
16
17
18
19
20
21
22
23
24
25
26
27
28
CW08
1
2
29
100p-C
30
1005
31
32
NC
33
GND1
NC
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
G1
G2
GND1
GND1
Main-BD to Terminal-BD Connector
• Since this is a basic circuit diagram, the value of the parts is subject to be altered for improvement.
3
From
Terminal-BD
AMP_PWR
002:5E
003:G6
+5.6V
002:5C
003:G4
004:2A
008:4A
009:1C
011:1B
012:1A
015:2A
016:1A
STB+5V
002:7A
012:4E
012:8E
013:5C
014:2B
014:2D
015:2A
5D
RW06
10k
1
2
008:5E
AUD_RST
HDRxMCK
011:8E
002:1E
POWER2TD
012:1D
HP_MUTN
8C
015:2B
HP_DET
016:1B
009:1B
CTS
014:2C
RTS
014:2C
RxD
014:2C
TxD
014:2C
GND1
DTR
014:2B
IRo_term
015:8D
ADC_LRCK
005:1E
ADC_DAT
005:1E
ADC_BCK
005:1E
DLY_BCK
005:7E
DLY_LRCK
005:7E
DLY_DAT
005:7E
12/21 以下削除
SCL_AUD
RW41, RW42, RW43, RW44, RW45, QW10, QW11
005:7D
SDA_AUD
005:7D
AUD_MUTn
6D
AUD_RSTn
6C
AUD_SEL
006:3C
4E
VGA_SDA
005:7D
VGA_SCL
005:7D
Dsub_H
4B
012:1E
013:5D
PWRSW_N
Dsub_V
4B
PC_Red
009:1D
012:1E
013:5D
PON_PSU
PC_Green
009:1D
PC_Blue
009:1D
002:5D
003:C6
003:G4
004:2E
005:1C
006:1A
009:1A
011:1A
016:1A
017:1A
017:6C
019:3E
019:4A
019:4D
019:6A
019:6D
AUD_SEL
L
H
4
5
004:5A
005:1A
GEN+3.3V
008:1D
009:7C
RW03 0
Š
1
2
RW04 0
1
2
Dsub_H
2D
Dsub_V
2D
CW02
0.1/16
1005
GND1
IW01
SN74LV14APW
GND1
RW01 0
1
2
‰
RW02 0
1
2
Schmitt Trigger Buffer
9/18 Add
RW33, RW34, QW07
9/10 Add
RW31, RW32, QW06
Reserve for anti-POP at turning off AC power
Change DW01 (Mount -> not Mount)
anti-POP at turning off the mechanical power SW
002:8B
005:1E
RW34
RW32
012:1E
QW07
2
10k
2
82k
4D
2SC5383-T111-1F
3
1
2
3
1
7D
PWR_OFF
1
1
10/23 RW32
QW02
10k -> 82k
2SC5383-T111-1F
RW26
RW33
82k
82k
GND1
SPK AMP Mute
002:7A
012:4E
012:8E
013:5C
STB+5V
014:2B
9/11 Change RW14
014:2D
10k -> 82k
015:2A
2C
RW14
82k
DW01
1
2
1
2
1SS355
RW08
2
47k
1
2
3
1
RW40
QW01
47k
2SC5383-T111-1F
1
2
GND1
GND1
DW06
1
2
PWR_OFF
002:8B
005:1E
1SS355
012:1E
4C
7D
DW02
1
2
AUD_MUTE
008:5E
1SS355
8/24 Add IW02, CW03
D+3.3V
CW03
0.1/16
1005
IW02
TC7SZ08FU
008:5E
HDRxMUTE
1
IN_B
VCC
5
011:8E
AUD_SEL
2
IN_A
006:3C
2D
DW03
1
2
3
GND
OUT_Y
4
1SS355
SELECT
HDMI
ADC(PC)
ADC(PC) HDMI
GND1
7/26 Del "HP_MUTE"
7/26 Del "HP_MUTEn"
7/26 Del
DW04, DW05, DW07, RW07, RW29, QW04
78
6
PC_HD
009:1E
PC_VD
009:1E
H_FREQ3
012:8D
V_FREQ3
012:8D
Audio Reset
AUD_RSTn
2D
2
2
3
1
QW06
2SC5383-T111-1F
RW31
82k
HP_MUTE
008:5E
GND1
002:8B
005:1E
012:1E
4C
PWR_OFF
4D
PWR_SW_MUTE
002:7A
012:4E
012:8E
014:2B
AUD_MUTn
014:2D
STB+5V
2D
015:2A
019:5C
2
2D
3
3B
1
QW03
2SC5383-T111-1F
RW28
002:1E
82k
012:1D
015:2B
RW37
2
016:1B
47k
1
2
3
3A
POWER2TD
1
QW09
2SC5383-T111-1F
GND1
11/6 DW10 Add
12/4 DW10 Not Mount -> Mount
/DG-DAT/FPD/D8M/D8M-Main/D8M-MAIN-47-B2B/
Initial Release
Folder Path
D8M-Main-47-B2B_001/D8M-Main-47-B2B_001.cir/
N.Suzuki
2008 07 31
D8MW Main PWB
T.Mochizuki
2008 07 31
Connector / etc
T.Mochizuki
2008 07 31
7
D8MW
< 変 更 来 歴 >
A
変 更 内 容
日 付
変更者
No.
山口
1
I2S BUS SW回路削除
2007/07/20
江越
2
DTR信号 追加
2007/07/23
平林
3
PW01および配線変更
2007/07/26
山口
4
PW01および配線変更
2007/08/23
山口
5
RW31, RW32, QW06追加
2007/09/10
平林
6
CW04,CW05,CW06,CW07,CW08追加
2007/10/08
平林
7
2007/10/19
HP追加のためCW09,CW10追加,CW07削除
"CTS","RTS","DTR"をPW02へ接続先変更
PW01のピン配置変更
平林
8
PW01のPC_R/G/BとGND_R/G/Bをピン配置入れ替え
2007/10/25
落合
9
32#01変更点(上記7，8)を適用
2007/10/29
落合
10
PC_R,PC_G,PC_B 75Ωインピーダンス配線指定
2007/10/29
落合
11
GND_G,GND_B,GND_RをベタGND化(GND1)
2007/10/29
平林
12
PW01変更（50pin->80pin）,RW37-RW40/CW11追加
2007/11/06
山口
13
DW10追加
2007/11/06
落合
11
Main-Terminal間コネクタ変更PW01→PW01,PW02
2007/12/10
B
C
HP_MUTN
2C
RW35
DW07
2
82k
1
2
1
2
3
1
1SS355
QW08
2SC5383-T111-1F
DW08
1
2
1SS355
DW09
GND1
1
2
1SS355
HP Mute
10/19 Add
D
DW12
1
2
1SS355
DW11
1
2
1SS355
E
< 回路 No. W>
DW10
1
2
1SS355
F
MAIN BOARD SHEET: 020
20
Connector / etc.
---------
20
Advertisement
Table of Contents
