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Acces I/O products PCI-DIO-48S User Manual

Digital input/output card

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10623 Roselle Street, San Diego, CA 92121
DIGITAL INPUT/OUTPUT CARD
Models PCI-DIO-48JP
contactus@accesio.com
and PCI-DIO-48JPS
USER MANUAL
(858) 550-9559
www.accesio.com
FAX (858) 550-7322
File: MPCI-DIO-48JPS.A1e

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Summary of Contents for Acces I/O products PCI-DIO-48S

  • Page 1 10623 Roselle Street, San Diego, CA 92121 • (858) 550-9559 • FAX (858) 550-7322 contactus@accesio.com • www.accesio.com DIGITAL INPUT/OUTPUT CARD Models PCI-DIO-48JP and PCI-DIO-48JPS USER MANUAL File: MPCI-DIO-48JPS.A1e...
  • Page 2 ACCES, nor the rights of others. IBM PC, PC/XT, and PC/AT are registered trademarks of the International Business Machines Corporation. Printed in USA. Copyright 1998, 2005 by ACCES I/O Products Inc, 10623 Roselle Street, San Diego, CA 92121. All rights reserved.
  • Page 3 Warranty Prior to shipment, ACCES equipment is thoroughly inspected and tested to applicable specifications. However, should equipment failure occur, ACCES assures its customers that prompt service and support will be available. All equipment originally manufactured by ACCES which is found to be defective will be repaired or replaced subject to the following considerations.
  • Page 4: Table Of Contents

    TABLE OF CONTENTS Chapter 1: Functional Description ................. 5 Figure 1-1: Block Diagram ........................6 Chapter 2: Installation ..................... 7 Chapter 3: Option Selection.................... 9 Figure 3-1: Option Selection Map......................9 Chapter 4: Address Selection..................10 Chapter 5: Software ....................... 11 Chapter 6: Programming....................
  • Page 5: Chapter 1: Functional Description

    Chapter 1: Functional Description FEATURES • 48 Bits of Digital Input/Output. • Interrupt Generation on Input or under program control (Model “48JP”) • Change-of-state Interrupt Software Enabled in Six 8-Input Ports.(Model “48JPS”) • All 48 I/O Lines Buffered on the Board. •...
  • Page 6 jumper is properly placed on the card the tristate buffers may be enabled/disabled under program control. (See the Option Selection section to follow.) I/O wiring connections are via a 68-pin high-density connector with screw locks. If needed for external circuits, +5 VDC power is available at pins 67 and 68. There is a resettable 0.5A polyfuse onboard that feeds both pins.
  • Page 7: Chapter 2: Installation

    Chapter 2: Installation A printed Quick-Start Guide (QSG) is packed with the card for your convenience. If you’ve already performed the steps from the QSG, you may find this chapter to be redundant and may skip forward to begin developing your application. The software provided with this card is on CD and must be installed onto your hard disk prior to use.
  • Page 8 Hardware Installation Make sure to set switches and jumpers from either the Option Selection section of this manual or from the suggestions of SETUP.EXE. Do not install card into the computer until the software has been fully installed. Turn OFF computer power AND unplug AC power from the system. Remove the computer cover.
  • Page 9: Chapter 3: Option Selection

    Chapter 3: Option Selection Refer to the setup programs on the CD provided with the card. Also, refer to the block diagram on the previous page and the option selection map on this page when reading this section of the manual. External Interrupts are accepted on the I/O connector pin 9 (bit C3 group 0) and pin 59 (bit C3 group 1).
  • Page 10: Chapter 4: Address Selection

    Chapter 4: Address Selection These cards use one address space, occupying sixteen consecutive register locations. PCI architecture is inherently plug-and-play. This means that the BIOS or Operating System determines the resources assigned to PCI cards rather than requiring the user to select those resources with switches or jumpers.
  • Page 11: Chapter 5: Software

    Chapter 5: Software The following paragraphs describe the setup program and, then, the VisualBASIC utility program SETUP.EXE This program is supplied in the root or base directory as a tool for you to use in configuring jumpers on the card. It is menu-driven and provides pictures of the card on the computer monitor. You make simple keystrokes to select functions.
  • Page 12 OutPort Function: Writes all 16 bits of value to the hardware port at address. This function returns the value output. Declaration: function OutPort(byval address as integer, byval value as integer) as integer Peek Function: Reads a byte from main memory (DRAM). Declaration: function Peek(byval segment...
  • Page 13: Chapter 6: Programming

    Chapter 6: Programming These cards are I/O-mapped devices that are easily configured from any language and any language can easily perform digital I/O through the card's ports. This is especially true if the form of the data is byte or word wide.
  • Page 14 Assignment Code Port C Lo (C0-C3) 1=Input, 0=Output Port B 1=Input, 0=Output Mode Select 1=Mode 1, 0=Mode 0 Port C Hi (C4-C7) 1=Input, 0=Output Port A 1=Input, 0=Output D5,D6 Mode Select 00=Mode 0, 01=Mode 1, 1X=Mode 2 Mode Set Flag 1=Active Table 6-2: Control Register Bit Assignment Note:...
  • Page 15 Similarly, the group 1 ports can be enabled/disabled via the control register at base address +7. The following program fragment in C language illustrates the foregoing: const BASE_ADDRESS 0x300; /*Set the mode to Mode 0, ports A and B as output, and port C as input. Since bit D7 is high, the output buffers are set to tristate condition.
  • Page 16 To set outputs high (1) at Port B and the lower nybble of Port C: 50OUT BASEADDR+1,&HFF'Turn on all Port B bits 60OUT BASEADDR+2,&HF'Turn on all bits of Port C lower nybble ENABLING/DISABLING I/O BUFFERS When using the tristate mode (Jumper in the TST position), the method to disable the I/O buffers involved writing a control word to the Control Register at Base Address +3 and Base Address +7.
  • Page 17 INTERRUPT EXAMPLES A rising edge with at least a microsecond hold time will be latched if the IEN jumper is in place and if any address decoded by the board has been read or written to. Interrupts are disabled on ‘power up’. An interrupt service routine may clear all interrupts from the board by writing any value to Base Address+Fh.
  • Page 18: Chapter 7: Connector Pin Assignments

    Chapter 7: Connector Pin Assignments The I/O Connector is a 68 pin, Pin-in-Socket SCSI Female type. A mating cable is available separately. Connector pin assignments are listed below. ASSIGNMENT ASSIGNMENT Group 0 Port C Hi Ground Group 0 Port C Hi "...
  • Page 19 ASSIGNMENT ASSIGNMENT Group 1 Port C Hi Ground Group 1 Port C Hi " Group 1 Port C Hi " Group 1 Port C Hi " Group 1 Port C Lo PC3* Ground Group 1 Port C Lo " Group 1 Port C Lo "...
  • Page 20 Customer Comments If you experience any problems with this manual or just want to give us some feedback, please email us at: manuals@accesio.com. Please detail any errors you find and include your mailing address so that we can send you any manual updates. 10623 Roselle Street, San Diego CA 92121 Tel.

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Pci-dio-48jpPci-dio-48jps