Function Table Of Ic - Sharp 1-BIT AMPLIFIER SM-SX1 Service Manual

IC800 VHiYM3436D/-1: Digital Interface Receiver (YM3436D)
• Outline
YM3436D(DIR2) is a LSI which receives and demodulates the digital/audio/interface/format signals which comply with EIAJ CP-
340 and AES/EBU. Keeping the features of the existing YM3623B(DIR), it is designed to not only strengthen the external
synchronization, error process and other functions but also be more general for the channel status, user data output and other
general applications.
Pin No. Port Name Input/Output
1 DAUX Input
2* HDLT Output
3 DOUT Output
4* VFL Output
5* OPT Output
6* SYNC Output
7 MCC Output
8 WC Output
9* MCB Output
10 MCA Output
11 SKSY Input
12 XI Input
13 XO Output
14* P256 Output
15 LOCKN Output
16 VSS —
17* TST2 Output
18 DIM1 Input
19 DIM0 Input
20 DOM1 Input
21 DOM0 Input
22 KM1 Input
23 RSTN Input
24 VDDA —
25 CTLN Input
26 PCO Output
27* N.C. —
28 CTLP Input
29 VSSA —
30* TSTN Input
31 KM2 Input
32 KM0 Input
33 FS1 Output
34 FS0 Output
35 CSM Input
36 EXTW Input
37 DDIN Input
38* LR Output
39 VDD —
40 ERR Output
41 EMP Output
42* CDO Output
43 CCK Input
44 CLD Input
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
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FUNCTION TABLE OF IC

Audio data auxiliary input
Asynchronous buffer operation flag output
Audio data output
Validity flag output
Synchronous signal output (fs) for DAC
Synchronous signal output (fs) for DSP
Bit clock output (64fs)
Word clock output (fs)
Bit clock output (128fs)
Bit clock output (256fs)
Clock synchronizing control input
Quartz oscillator connection, or external clock input (256fs)
Quartz oscillator connection
VCO clock output (When clocked, 256fs)
PLL lock flag output ('L': Clocked, 'H': Unlocked)
Grand (logic system)
LSI test terminal (As usual, don't connect it.)
Data input mode selection 1
Data input mode selection 0
Data output mode selection 1
Data output mode selection 0
Clock mode selection 1 ('H': PLL auto switch, 'L': XI fixed)
System reset input (active low)
+5V power supply (VCO system. Externally connect it to VDD.)
VCO control input
PLL phase comparative output
Not used
VCO adjustment input (As usual, connect it to VSSA.)
Grand (VCO system. Externally connect it to VSS.)
LSI test terminal (As usual, it is not connected.)
Clock mode selection 2 ('H": PLL synchronization, 'L': XI synchronization)
Clock mode selection 0 ('H': EXTW input, 'L': DDIN input)
Sampling frequency code output 1/channel status output
Sampling frequency code output 0/user data output
Channel status, user data output method selection
External synchronizing auxiliary input, Word clock
EIAJ(AES/EBU) digital audio interface signal input
PLL word clock output (When locked, fs)
+5V power (logic system)
Data error flag output
Emphasis control code output/block start synchronizing signal output
Microcomputer interface data output
Microcomputer interface clock input
Microcomputer interface load input
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SM-SX1/SX1W
Function